]> git.baikalelectronics.ru Git - kernel.git/commitdiff
crypto: sun4i-ss - simplify enable/disable of the device
authorCorentin Labbe <clabbe.montjoie@gmail.com>
Tue, 24 Sep 2019 08:08:31 +0000 (10:08 +0200)
committerHerbert Xu <herbert@gondor.apana.org.au>
Fri, 4 Oct 2019 15:06:20 +0000 (01:06 +1000)
This patch regroups resource enabling/disabling in dedicated function.
This simplify error handling and will permit to support power
management.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/sunxi-ss/sun4i-ss-core.c

index 9aa6fe081a2743406fdcf16d6d9dc253ffd56dee..6c2db5d83b063ed7202be0e1ee0edfd2dacf6f5a 100644 (file)
@@ -223,6 +223,45 @@ static struct sun4i_ss_alg_template ss_algs[] = {
 #endif
 };
 
+static void sun4i_ss_disable(struct sun4i_ss_ctx *ss)
+{
+       if (ss->reset)
+               reset_control_assert(ss->reset);
+
+       clk_disable_unprepare(ss->ssclk);
+       clk_disable_unprepare(ss->busclk);
+}
+
+static int sun4i_ss_enable(struct sun4i_ss_ctx *ss)
+{
+       int err;
+
+       err = clk_prepare_enable(ss->busclk);
+       if (err) {
+               dev_err(ss->dev, "Cannot prepare_enable busclk\n");
+               goto err_enable;
+       }
+
+       err = clk_prepare_enable(ss->ssclk);
+       if (err) {
+               dev_err(ss->dev, "Cannot prepare_enable ssclk\n");
+               goto err_enable;
+       }
+
+       if (ss->reset) {
+               err = reset_control_deassert(ss->reset);
+               if (err) {
+                       dev_err(ss->dev, "Cannot deassert reset control\n");
+                       goto err_enable;
+               }
+       }
+
+       return err;
+err_enable:
+       sun4i_ss_disable(ss);
+       return err;
+}
+
 static int sun4i_ss_probe(struct platform_device *pdev)
 {
        u32 v;
@@ -269,17 +308,9 @@ static int sun4i_ss_probe(struct platform_device *pdev)
                ss->reset = NULL;
        }
 
-       /* Enable both clocks */
-       err = clk_prepare_enable(ss->busclk);
-       if (err) {
-               dev_err(&pdev->dev, "Cannot prepare_enable busclk\n");
-               return err;
-       }
-       err = clk_prepare_enable(ss->ssclk);
-       if (err) {
-               dev_err(&pdev->dev, "Cannot prepare_enable ssclk\n");
-               goto error_ssclk;
-       }
+       err = sun4i_ss_enable(ss);
+       if (err)
+               goto error_enable;
 
        /*
         * Check that clock have the correct rates given in the datasheet
@@ -288,16 +319,7 @@ static int sun4i_ss_probe(struct platform_device *pdev)
        err = clk_set_rate(ss->ssclk, cr_mod);
        if (err) {
                dev_err(&pdev->dev, "Cannot set clock rate to ssclk\n");
-               goto error_clk;
-       }
-
-       /* Deassert reset if we have a reset control */
-       if (ss->reset) {
-               err = reset_control_deassert(ss->reset);
-               if (err) {
-                       dev_err(&pdev->dev, "Cannot deassert reset control\n");
-                       goto error_clk;
-               }
+               goto error_enable;
        }
 
        /*
@@ -387,12 +409,8 @@ error_alg:
                        break;
                }
        }
-       if (ss->reset)
-               reset_control_assert(ss->reset);
-error_clk:
-       clk_disable_unprepare(ss->ssclk);
-error_ssclk:
-       clk_disable_unprepare(ss->busclk);
+error_enable:
+       sun4i_ss_disable(ss);
        return err;
 }
 
@@ -416,10 +434,7 @@ static int sun4i_ss_remove(struct platform_device *pdev)
        }
 
        writel(0, ss->base + SS_CTL);
-       if (ss->reset)
-               reset_control_assert(ss->reset);
-       clk_disable_unprepare(ss->busclk);
-       clk_disable_unprepare(ss->ssclk);
+       sun4i_ss_disable(ss);
        return 0;
 }