Merge tag 'riscv-for-linus-5.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel...

Pull RISC-V updates from Palmer Dabbelt:

 - Enabling the FPU is now a static_key

 - Improvements to the Svpbmt support

 - CPU topology bindings for a handful of systems

 - Support for systems with 64-bit hart IDs

 - Many settings have been enabled in the defconfig, including both
   support for the StarFive systems and many of the Docker requirements

There are also a handful of cleanups and improvements, as usual.

* tag 'riscv-for-linus-5.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (28 commits)
  riscv: enable Docker requirements in defconfig
  riscv: convert the t-head pbmt errata to use the __nops macro
  riscv: introduce nops and __nops macros for NOP sequences
  RISC-V: Add fast call path of crash_kexec()
  riscv: mmap with PROT_WRITE but no PROT_READ is invalid
  riscv/efi_stub: Add 64bit boot-hartid support on RV64
  riscv: cpu: Add 64bit hartid support on RV64
  riscv: smp: Add 64bit hartid support on RV64
  riscv: spinwait: Fix hartid variable type
  riscv: cpu_ops_sbi: Add 64bit hartid support on RV64
  riscv: dts: sifive: "fix" pmic watchdog node name
  riscv: dts: canaan: Add k210 topology information
  riscv: dts: sifive: Add fu740 topology information
  riscv: dts: sifive: Add fu540 topology information
  riscv: dts: starfive: Add JH7100 CPU topology
  RISC-V: Add CONFIG_{NON,}PORTABLE
  riscv: config: enable SOC_STARFIVE in defconfig
  riscv: dts: microchip: Add mpfs' topology information
  riscv: Kconfig.socs: Add comments
  riscv: Kconfig.erratas: Add comments
  ...

diff --cc arch/riscv/Kconfig
Simple merge

diff --cc arch/riscv/boot/dts/microchip/mpfs.dtsi
Simple merge

diff --cc arch/riscv/include/asm/errata_list.h
index 416ead0f9a655909b243ee52fc197d117f712bbf,e4ee53551343bc7a0c0996d34b280a9d00dd3f35..398e351e7002e784d2af00c5c544514813dfb2ce
--- 1/arch/riscv/include/asm/errata_list.h
--- 2/arch/riscv/include/asm/errata_list.h
+++ b/arch/riscv/include/asm/errata_list.h
@@@ -68,19 -68,13 +68,13 @@@ asm(ALTERNATIVE_2("li %0, 0\t\nnop"
   */
  #define ALT_THEAD_PMA(_val)                                           \
  asm volatile(ALTERNATIVE(                                             \
-       "nop\n\t"                                                       \
-       "nop\n\t"                                                       \
-       "nop\n\t"                                                       \
-       "nop\n\t"                                                       \
-       "nop\n\t"                                                       \
-       "nop\n\t"                                                       \
-       "nop",                                                          \
+       __nops(7),                                                      \
 -      "li      t3, %2\n\t"                                            \
 -      "slli    t3, t3, %4\n\t"                                        \
 +      "li      t3, %1\n\t"                                            \
 +      "slli    t3, t3, %3\n\t"                                        \
        "and     t3, %0, t3\n\t"                                        \
        "bne     t3, zero, 2f\n\t"                                      \
 -      "li      t3, %3\n\t"                                            \
 -      "slli    t3, t3, %4\n\t"                                        \
 +      "li      t3, %2\n\t"                                            \
 +      "slli    t3, t3, %3\n\t"                                        \
        "or      %0, %0, t3\n\t"                                        \
        "2:",  THEAD_VENDOR_ID,                                         \
                ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT)            \

diff --cc arch/riscv/include/asm/pci.h
index 6ef4a1426194fb1077629bb634f430510d3439e2,830ac621dbbca91a4b9f325d993f399d35d54bb4..cc2a184cfc2e1f96bbe445d203d26a0689deb51a
--- 1/arch/riscv/include/asm/pci.h
--- 2/arch/riscv/include/asm/pci.h
+++ b/arch/riscv/include/asm/pci.h
@@@ -12,7 -12,31 +12,10 @@@
  
  #include <asm/io.h>
  
 -/* RISC-V shim does not initialize PCI bus */
 -#define pcibios_assign_all_busses() 1
 -
 -#define ARCH_GENERIC_PCI_MMAP_RESOURCE 1
 -
 -extern int isa_dma_bridge_buggy;
 -
 -#ifdef CONFIG_PCI
 -static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
 -{
 -      /* no legacy IRQ on risc-v */
 -      return -ENODEV;
 -}
 -
 -static inline int pci_proc_domain(struct pci_bus *bus)
 -{
 -      /* always show the domain in /proc */
 -      return 1;
 -}
 -
 -#ifdef        CONFIG_NUMA
 -
+ #define PCIBIOS_MIN_IO                4
+ #define PCIBIOS_MIN_MEM               16
+ 
 +#if defined(CONFIG_PCI) && defined(CONFIG_NUMA)
  static inline int pcibus_to_node(struct pci_bus *bus)
  {
        return dev_to_node(&bus->dev);

diff --cc drivers/irqchip/irq-sifive-plic.c
Simple merge