Merge branches 'x86-cpu-for-linus' and 'x86-fpu-for-linus' of git://git.kernel.org...

Pull x86 cpu and fpu updates from Ingo Molnar:

 - math-emu fixes

 - CPUID updates

 - sanity-check RDRAND output to see whether the CPU at least pretends
   to produce random data

 - various unaligned-access across cachelines fixes in preparation of
   hardware level split-lock detection

 - fix MAXSMP constraints to not allow !CPUMASK_OFFSTACK kernels with
   larger than 512 NR_CPUS

 - misc FPU related cleanups

* 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/cpu: Align the x86_capability array to size of unsigned long
  x86/cpu: Align cpu_caps_cleared and cpu_caps_set to unsigned long
  x86/umip: Make the comments vendor-agnostic
  x86/Kconfig: Rename UMIP config parameter
  x86/Kconfig: Enforce limit of 512 CPUs with MAXSMP and no CPUMASK_OFFSTACK
  x86/cpufeatures: Add feature bit RDPRU on AMD
  x86/math-emu: Limit MATH_EMULATION to 486SX compatibles
  x86/math-emu: Check __copy_from_user() result
  x86/rdrand: Sanity-check RDRAND output

* 'x86-fpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/fpu: Use XFEATURE_FP/SSE enum values instead of hardcoded numbers
  x86/fpu: Shrink space allocated for xstate_comp_offsets
  x86/fpu: Update stale variable name in comment

diff --cc arch/x86/Kconfig
index 99c3ddd007ce8dac53b0e9b565a4352858dd30b9,434fae95279cf129b0b5b5061d33ba65bbb2bf15,d6e1faa28c58ebaea297e8e450e9edf2319b3a1a..2e6a53881b7bdaf7df357a51fce0c8ff4c99141e
--- 1/arch/x86/Kconfig
--- 2/arch/x86/Kconfig
--- 3/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@@@ -1850,16 -1880,16 -1880,16 +1850,16 @@@@ config X86_SMA
   
          If unsure, say Y.
   
- -config X86_INTEL_UMIP
+ +config X86_UMIP
        def_bool y
- -     depends on CPU_SUP_INTEL
- -     prompt "Intel User Mode Instruction Prevention" if EXPERT
-       ---help---
-         The User Mode Instruction Prevention (UMIP) is a security
-         feature in newer Intel processors. If enabled, a general
-         protection fault is issued if the SGDT, SLDT, SIDT, SMSW
-         or STR instructions are executed in user mode. These instructions
-         unnecessarily expose information about the hardware state.
+ +     depends on CPU_SUP_INTEL || CPU_SUP_AMD
+ +     prompt "User Mode Instruction Prevention" if EXPERT
+       ---help---
  -       The User Mode Instruction Prevention (UMIP) is a security
  -       feature in newer Intel processors. If enabled, a general
  -       protection fault is issued if the SGDT, SLDT, SIDT, SMSW
  -       or STR instructions are executed in user mode. These instructions
  -       unnecessarily expose information about the hardware state.
+ +       User Mode Instruction Prevention (UMIP) is a security feature in
+ +       some x86 processors. If enabled, a general protection fault is
+ +       issued if the SGDT, SLDT, SIDT, SMSW or STR instructions are
+ +       executed in user mode. These instructions unnecessarily expose
+ +       information about the hardware state.
   
          The vast majority of applications do not use these instructions.
          For the very few that do, software emulation is provided in

diff --cc arch/x86/include/asm/cpufeatures.h
Simple merge

diff --cc arch/x86/include/asm/processor.h
Simple merge

diff --cc arch/x86/kernel/Makefile
Simple merge

diff --cc arch/x86/kernel/cpu/common.c
Simple merge

diff --cc arch/x86/kernel/umip.c
Simple merge