drm/i915/tgl: Program MBUS_ABOX{1,2}_CTL during display init

On gen11 we only needed to program MBus credits into MBUS_ABOX_CTL
during display initialization, but on gen12 we're now supposed to
program the same values into MBUS_ABOX1_CTL and MBUS_ABOX2_CTL as well.

v2:
 - Program registers with rmw to preserve contents of unrelated bits.
 - Switch to the new display uncore helpers.

Bspec: 49213
Bspec: 50096
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200204011032.582737-2-matthew.d.roper@intel.com
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 6e1d5d70083e2ed12aef39970ec13dbbee321416..0d94fe01be7fbc028a2c4ab279e4e5b89e26052f 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -4498,6 +4498,10 @@ static void icl_mbus_init(struct drm_i915_private *dev_priv)
                MBUS_ABOX_BW_CREDIT(1);
 
        intel_de_rmw(dev_priv, MBUS_ABOX_CTL, mask, val);
+       if (INTEL_GEN(dev_priv) >= 12) {
+               intel_de_rmw(dev_priv, MBUS_ABOX1_CTL, mask, val);
+               intel_de_rmw(dev_priv, MBUS_ABOX2_CTL, mask, val);
+       }
 }
 
 static void hsw_assert_cdclk(struct drm_i915_private *dev_priv)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index faf8945a51b0b031a10bd23930ec1011d3f305a5..4acb6deaf97dcfd920436612160e12299588ce54 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2865,6 +2865,8 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define MI_ARB_STATE   _MMIO(0x20e4) /* 915+ only */
 
 #define MBUS_ABOX_CTL                  _MMIO(0x45038)
+#define MBUS_ABOX1_CTL                 _MMIO(0x45048)
+#define MBUS_ABOX2_CTL                 _MMIO(0x4504C)
 #define MBUS_ABOX_BW_CREDIT_MASK       (3 << 20)
 #define MBUS_ABOX_BW_CREDIT(x)         ((x) << 20)
 #define MBUS_ABOX_B_CREDIT_MASK                (0xF << 16)