MIPS: Loongson: Add Loongson-3A R3 basic support

Loongson-3A R3 is very similar to Loongson-3A R2.

All Loongson-3 CPU family:

Code-name       Brand-name       PRId
Loongson-3A R1  Loongson-3A1000  0x6305
Loongson-3A R2  Loongson-3A2000  0x6308
Loongson-3A R3  Loongson-3A3000  0x6309
Loongson-3B R1  Loongson-3B1000  0x6306
Loongson-3B R2  Loongson-3B1500  0x6307

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J . Hill <Steven.Hill@cavium.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16585/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 3069359b01204a13638888c5c5fcfdec62c8c713..53b8b1f490846c92b8cad61489af32b64aace38c 100644 (file)
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -248,6 +248,7 @@
 #define PRID_REV_LOONGSON3B_R1 0x0006
 #define PRID_REV_LOONGSON3B_R2 0x0007
 #define PRID_REV_LOONGSON3A_R2 0x0008
+#define PRID_REV_LOONGSON3A_R3 0x0009
 
 /*
  * Older processors used to encode processor version and revision in two

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 353ade2c130a3ddce6e0fffb72063d9bf26dfacc..09462bba629fa51f5c20a00a65eee4397ee935cf 100644 (file)
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1836,6 +1836,12 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
                        set_elf_platform(cpu, "loongson3a");
                        set_isa(c, MIPS_CPU_ISA_M64R2);
                        break;
+               case PRID_REV_LOONGSON3A_R3:
+                       c->cputype = CPU_LOONGSON3;
+                       __cpu_name[cpu] = "ICT Loongson-3";
+                       set_elf_platform(cpu, "loongson3a");
+                       set_isa(c, MIPS_CPU_ISA_M64R2);
+                       break;
                }
 
                decode_configs(c);

diff --git a/arch/mips/loongson64/common/env.c b/arch/mips/loongson64/common/env.c
index 6afa2185026703843c9b46a931c4bdb35e11c483..4707abfe9d641dc5a970bfba73180ff9ea30cbe6 100644 (file)
--- a/arch/mips/loongson64/common/env.c
+++ b/arch/mips/loongson64/common/env.c
@@ -193,6 +193,7 @@ void __init prom_init_env(void)
                        break;
                case PRID_REV_LOONGSON3A_R1:
                case PRID_REV_LOONGSON3A_R2:
+               case PRID_REV_LOONGSON3A_R3:
                        cpu_clock_freq = 900000000;
                        break;
                case PRID_REV_LOONGSON3B_R1:

diff --git a/arch/mips/loongson64/loongson-3/smp.c b/arch/mips/loongson64/loongson-3/smp.c
index 64659fc73940538350d0b72b6109b42333543a9f..1629743ba96aaac9e15f5b2714f8813ae95a1d5c 100644 (file)
--- a/arch/mips/loongson64/loongson-3/smp.c
+++ b/arch/mips/loongson64/loongson-3/smp.c
@@ -503,7 +503,7 @@ static void loongson3a_r1_play_dead(int *state_addr)
                : "a1");
 }
 
-static void loongson3a_r2_play_dead(int *state_addr)
+static void loongson3a_r2r3_play_dead(int *state_addr)
 {
        register int val;
        register long cpuid, core, node, count;
@@ -664,8 +664,9 @@ void play_dead(void)
                        (void *)CKSEG1ADDR((unsigned long)loongson3a_r1_play_dead);
                break;
        case PRID_REV_LOONGSON3A_R2:
+       case PRID_REV_LOONGSON3A_R3:
                play_dead_at_ckseg1 =
-                       (void *)CKSEG1ADDR((unsigned long)loongson3a_r2_play_dead);
+                       (void *)CKSEG1ADDR((unsigned long)loongson3a_r2r3_play_dead);
                break;
        case PRID_REV_LOONGSON3B_R1:
        case PRID_REV_LOONGSON3B_R2:

diff --git a/drivers/platform/mips/cpu_hwmon.c b/drivers/platform/mips/cpu_hwmon.c
index 4300a558d0f39a4d15e7743368bc2a3a68e98b8e..46ab7d86ae1c8c0234b7f890cd06843dc98c6010 100644 (file)
--- a/drivers/platform/mips/cpu_hwmon.c
+++ b/drivers/platform/mips/cpu_hwmon.c
@@ -17,14 +17,23 @@
  */
 int loongson3_cpu_temp(int cpu)
 {
-       u32 reg;
+       u32 reg, prid_rev;
 
        reg = LOONGSON_CHIPTEMP(cpu);
-       if ((read_c0_prid() & PRID_REV_MASK) == PRID_REV_LOONGSON3A_R1)
+       prid_rev = read_c0_prid() & PRID_REV_MASK;
+       switch (prid_rev) {
+       case PRID_REV_LOONGSON3A_R1:
                reg = (reg >> 8) & 0xff;
-       else
+               break;
+       case PRID_REV_LOONGSON3A_R2:
+       case PRID_REV_LOONGSON3B_R1:
+       case PRID_REV_LOONGSON3B_R2:
                reg = ((reg >> 8) & 0xff) - 100;
-
+               break;
+       case PRID_REV_LOONGSON3A_R3:
+               reg = (reg & 0xffff)*731/0x4000 - 273;
+               break;
+       }
        return (int)reg * 1000;
 }