setbits_be32(&pgpio->gpdat, 0x00080000);
#endif
-#ifdef CONFIG_SLIC
+#ifdef CFG_SLIC
/* reset SLIC */
setbits_be32(&pgpio->gpdir, 0x00040000);
setbits_be32(&pgpio->gpdat, 0x00040000);
#include <linux/stringify.h>
#if defined(CONFIG_TARGET_P1020RDB_PC)
-#define CONFIG_SLIC
+#define CFG_SLIC
#define __SW_BOOT_MASK 0x03
#define __SW_BOOT_NOR 0x5c
#define __SW_BOOT_SPI 0x1c
* 011101 800 800 400 667 PCIe-2 Core0 boot; Core1 hold-off
*/
#if defined(CONFIG_TARGET_P1020RDB_PD)
-#define CONFIG_SLIC
+#define CFG_SLIC
#define __SW_BOOT_MASK 0x03
#define __SW_BOOT_NOR 0x64
#define __SW_BOOT_SPI 0x34