* - Convert to new framebuffer API,
* fix colormap setting at 16 bits/pixel (565)
*
- * Paul Mundt
+ * Paul Mundt
* - PCI hotplug
*
* Jon Smirl <jonsmirl@yahoo.com>
* - endian conversions may possibly be avoided by
* using the other register aperture. TODO.
*/
-static inline u32 _aty_ld_le32(volatile unsigned int regindex,
+static inline u32 _aty_ld_le32(volatile unsigned int regindex,
const struct aty128fb_par *par)
{
return readl (par->regbase + regindex);
}
-static inline void _aty_st_le32(volatile unsigned int regindex, u32 val,
+static inline void _aty_st_le32(volatile unsigned int regindex, u32 val,
const struct aty128fb_par *par)
{
writel (val, par->regbase + regindex);
static u32 _aty_ld_pll(unsigned int pll_index,
const struct aty128fb_par *par)
-{
+{
aty_st_8(CLOCK_CNTL_INDEX, pll_index & 0x3F);
return aty_ld_le32(CLOCK_CNTL_DATA);
}
-
+
static void _aty_st_pll(unsigned int pll_index, u32 val,
const struct aty128fb_par *par)
{
aty_st_le32(BIOS_0_SCRATCH, 0xAAAAAAAA);
if (aty_ld_le32(BIOS_0_SCRATCH) == 0xAAAAAAAA)
- flag = 1;
+ flag = 1;
}
aty_st_le32(BIOS_0_SCRATCH, val); // restore value
bios_hdr = BIOS_IN16(0x48);
bios_pll = BIOS_IN16(bios_hdr + 0x30);
-
+
par->constants.ppll_max = BIOS_IN32(bios_pll + 0x16);
par->constants.ppll_min = BIOS_IN32(bios_pll + 0x12);
par->constants.xclk = BIOS_IN16(bios_pll + 0x08);
par->constants.xclk, par->constants.ref_divider,
par->constants.ref_clk);
-}
+}
#ifdef CONFIG_X86
static void __iomem *aty128_find_mem_vbios(struct aty128fb_par *par)
*/
u32 segstart;
unsigned char __iomem *rom_base = NULL;
-
+
for (segstart=0x000c0000; segstart<0x000f0000; segstart+=0x00001000) {
rom_base = ioremap(segstart, 0x10000);
if (rom_base == NULL)
v_sync_wid = 1;
else if (v_sync_wid > 0x1f) /* 0x1f = max vwidth */
v_sync_wid = 0x1f;
-
+
v_sync_strt = v_disp + lower;
h_sync_pol = sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1;
v_sync_pol = sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1;
-
+
c_sync = sync & FB_SYNC_COMP_HIGH_ACT ? (1 << 4) : 0;
crtc->gen_cntl = 0x3000000L | c_sync | (dst << 8);
aty_st_le32(LVDS_GEN_CNTL, reg);
#ifdef CONFIG_FB_ATY128_BACKLIGHT
aty128_bl_set_power(info, FB_BLANK_UNBLANK);
-#endif
+#endif
} else {
#ifdef CONFIG_FB_ATY128_BACKLIGHT
aty128_bl_set_power(info, FB_BLANK_POWERDOWN);
-#endif
+#endif
reg = aty_ld_le32(LVDS_GEN_CNTL);
reg |= LVDS_DISPLAY_DIS;
aty_st_le32(LVDS_GEN_CNTL, reg);
* This actually sets the video mode.
*/
static int aty128fb_set_par(struct fb_info *info)
-{
+{
struct aty128fb_par *par = info->par;
u32 config;
int err;
var->accel_flags = par->accel_flags;
return 0;
-}
+}
static int aty128fb_check_var(struct fb_var_screeninfo *var,
/* PowerBook Titanium */
if (of_machine_is_compatible("PowerBook3,2"))
default_vmode = VMODE_1152_768_60;
-
- if (default_cmode > 16)
+
+ if (default_cmode > 16)
default_cmode = CMODE_32;
- else if (default_cmode > 8)
+ else if (default_cmode > 8)
default_cmode = CMODE_16;
- else
+ else
default_cmode = CMODE_8;
if (mac_vmode_to_var(default_vmode, default_cmode, &var))
#endif /* CONFIG_PPC_PMAC */
{
if (mode_option)
- if (fb_find_mode(&var, info, mode_option, NULL,
+ if (fb_find_mode(&var, info, mode_option, NULL,
0, &defaultmode, 8) == 0)
var = default_var;
}
struct aty128fb_par *par = info->par;
u32 value;
int rc;
-
+
switch (cmd) {
case FBIO_ATY128_SET_MIRROR:
if (par->chip_gen != rage_M3)
par->crt_on = (value & 0x02) != 0;
if (!par->crt_on && !par->lcd_on)
par->lcd_on = 1;
- aty128_set_crt_enable(par, par->crt_on);
- aty128_set_lcd_enable(par, par->lcd_on);
+ aty128_set_crt_enable(par, par->crt_on);
+ aty128_set_lcd_enable(par, par->lcd_on);
return 0;
case FBIO_ATY128_GET_MIRROR:
if (par->chip_gen != rage_M3)
if (!par->pdev->pm_cap)
return;
-
+
/* Set the chip into the appropriate suspend mode (we use D2,
* D3 would require a complete re-initialisation of the chip,
* including PCI config registers, clocks, AGP configuration, ...)
*/
return 0;
#endif /* CONFIG_PPC_PMAC */
-
+
if (state.event == pdev->dev.power.power_state.event)
return 0;
printk(KERN_DEBUG "aty128fb: suspending...\n");
-
+
console_lock();
fb_set_suspend(info, 1);
* Copyright 2000 Ani Joshi <ajoshi@kernel.crashing.org>
*
* i2c bits from Luca Tettamanti <kronos@kronoz.cjb.net>
- *
+ *
* Special thanks to ATI DevRel team for their hardware donations.
*
* ...Insert GPL boilerplate here...
/* Radeon IGP320M (U1) */
CHIP_DEF(PCI_CHIP_RS100_4336, RS100, CHIP_HAS_CRTC2 | CHIP_IS_IGP | CHIP_IS_MOBILITY),
/* Radeon IGP320 (A3) */
- CHIP_DEF(PCI_CHIP_RS100_4136, RS100, CHIP_HAS_CRTC2 | CHIP_IS_IGP),
+ CHIP_DEF(PCI_CHIP_RS100_4136, RS100, CHIP_HAS_CRTC2 | CHIP_IS_IGP),
/* IGP330M/340M/350M (U2) */
CHIP_DEF(PCI_CHIP_RS200_4337, RS200, CHIP_HAS_CRTC2 | CHIP_IS_IGP | CHIP_IS_MOBILITY),
/* IGP330/340/350 (A4) */
* interfere with anything
*/
static reg_val common_regs[] = {
- { OVR_CLR, 0 },
+ { OVR_CLR, 0 },
{ OVR_WID_LEFT_RIGHT, 0 },
{ OVR_WID_TOP_BOTTOM, 0 },
{ OV0_SCALE_CNTL, 0 },
/*
* globals
*/
-
+
static char *mode_option;
static char *monitor_layout;
static bool noaccel = 0;
* ROM somewhere in the first meg. We will just ignore the copy
* and use the ROM directly.
*/
-
+
/* Fix from ATI for problem with Radeon hardware not leaving ROM enabled */
unsigned int temp;
temp = INREG(MPP_TB_CONFIG);
temp |= 0x04 << 24;
OUTREG(MPP_TB_CONFIG, temp);
temp = INREG(MPP_TB_CONFIG);
-
+
rom = pci_map_rom(dev, &rom_size);
if (!rom) {
printk(KERN_ERR "radeonfb (%s): ROM failed to map\n",
pci_name(rinfo->pdev));
return -ENOMEM;
}
-
+
rinfo->bios_seg = rom;
/* Very simple test to make sure it appeared */
*/
u32 segstart;
void __iomem *rom_base = NULL;
-
+
for(segstart=0x000c0000; segstart<0x000f0000; segstart+=0x00001000) {
rom_base = ioremap(segstart, 0x10000);
if (rom_base == NULL)
for(i=0; i<1000000; i++)
if (((INREG(CRTC_VLINE_CRNT_VLINE) >> 16) & 0x3ff) == 0)
break;
-
+
stop_time = ktime_get();
-
+
local_irq_enable();
total_usecs = ktime_us_delta(stop_time, start_time);
if (total_usecs >= 10 * USEC_PER_SEC || total_usecs == 0)
return -1;
hz = USEC_PER_SEC/(u32)total_usecs;
-
+
hTotal = ((INREG(CRTC_H_TOTAL_DISP) & 0x1ff) + 1) * 8;
vTotal = ((INREG(CRTC_V_TOTAL_DISP) & 0x3ff) + 1);
vclk = (long long)hTotal * (long long)vTotal * hz;
denom *= 3;
break;
case 6:
- denom *= 6;
+ denom *= 6;
break;
case 7:
denom *= 12;
v.green.length = 6;
v.blue.length = 5;
v.transp.offset = v.transp.length = 0;
- break;
+ break;
case 24:
nom = 4;
den = 1;
v.yres_virtual = v.yres;
if (v.xres_virtual < v.xres)
v.xres_virtual = v.xres;
-
+
/* XXX I'm adjusting xres_virtual to the pitch, that may help XFree
* with some panels, though I don't quite like this solution
if (v.xoffset > v.xres_virtual - v.xres)
v.xoffset = v.xres_virtual - v.xres - 1;
-
+
if (v.yoffset > v.yres_virtual - v.yres)
v.yoffset = v.yres_virtual - v.yres - 1;
-
+
v.red.msb_right = v.green.msb_right = v.blue.msb_right =
v.transp.offset = v.transp.length =
v.transp.msb_right = 0;
-
+
memcpy(var, &v, sizeof(v));
return 0;
if ((var->xoffset + info->var.xres > info->var.xres_virtual)
|| (var->yoffset + info->var.yres > info->var.yres_virtual))
return -EINVAL;
-
+
if (rinfo->asleep)
return 0;
if (rinfo->asleep)
return 0;
-
+
return radeon_screen_blank(rinfo, blank, 0);
}
} else {
/* R300 uses ref_div_acc field as real ref divider */
OUTPLLP(PPLL_REF_DIV,
- (mode->ppll_ref_div << R300_PPLL_REF_DIV_ACC_SHIFT),
+ (mode->ppll_ref_div << R300_PPLL_REF_DIV_ACC_SHIFT),
~R300_PPLL_REF_DIV_ACC_MASK);
}
} else
workaround shouldn't have any effect on them. */
for (i = 0; (i < 10000 && INPLL(PPLL_REF_DIV) & PPLL_ATOMIC_UPDATE_R); i++)
;
-
+
OUTPLL(HTOTAL_CNTL, 0);
/* Clear reset & atomic update */
radeon_fifo_wait(2);
OUTPLL(VCLK_ECP_CNTL, mode->vclk_ecp_cntl);
-
+
return;
}
/* Clear auto-center etc... */
newmode->crtc_more_cntl = rinfo->init_state.crtc_more_cntl;
newmode->crtc_more_cntl &= 0xfffffff0;
-
+
if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) {
newmode->crtc_ext_cntl = VGA_ATI_LINEAR | XCRT_CNT_EN;
if (mirror)
newmode->surface_cntl |= NONSURF_AP0_SWP_16BPP;
newmode->surface_cntl |= NONSURF_AP1_SWP_16BPP;
break;
- case 24:
+ case 24:
case 32:
newmode->surface_cntl |= NONSURF_AP0_SWP_32BPP;
newmode->surface_cntl |= NONSURF_AP1_SWP_32BPP;
}
save_crtc_gen_cntl = INREG(CRTC_GEN_CNTL);
save_crtc_ext_cntl = INREG(CRTC_EXT_CNTL);
-
+
OUTREG(CRTC_EXT_CNTL, save_crtc_ext_cntl | CRTC_DISPLAY_DIS);
OUTREG(CRTC_GEN_CNTL, save_crtc_gen_cntl | CRTC_DISP_REQ_EN_B);
mdelay(100);
#ifdef SET_MC_FB_FROM_APERTURE
/* Set framebuffer to be at the same address as set in PCI BAR */
- OUTREG(MC_FB_LOCATION,
+ OUTREG(MC_FB_LOCATION,
((aper_base + aper_size - 1) & 0xffff0000) | (aper_base >> 16));
rinfo->fb_local_base = aper_base;
#else
OUTREG(CRTC_GEN_CNTL, save_crtc_gen_cntl);
OUTREG(CRTC_EXT_CNTL, save_crtc_ext_cntl);
if (rinfo->has_CRTC2)
- OUTREG(CRTC2_GEN_CNTL, save_crtc2_gen_cntl);
+ OUTREG(CRTC2_GEN_CNTL, save_crtc2_gen_cntl);
pr_debug("aper_base: %08x MC_FB_LOC to: %08x, MC_AGP_LOC to: %08x\n",
aper_base,
int err = 0;
pr_debug("radeonfb_pci_register BEGIN\n");
-
+
/* Enable device in PCI config */
ret = pci_enable_device(pdev);
if (ret < 0) {
goto err_disable;
}
rinfo = info->par;
- rinfo->info = info;
+ rinfo->info = info;
rinfo->pdev = pdev;
-
+
spin_lock_init(&rinfo->reg_lock);
timer_setup(&rinfo->lvds_timer, radeon_lvds_timer_func, 0);
{
struct fb_info *info = pci_get_drvdata(pdev);
struct radeonfb_info *rinfo = info->par;
-
+
if (!rinfo)
return;
iounmap(rinfo->mmio_base);
iounmap(rinfo->fb_base);
-
+
pci_release_region(pdev, 2);
pci_release_region(pdev, 0);
fb_destroy_modedb(rinfo->mon1_modedb);
#ifdef CONFIG_FB_RADEON_I2C
radeon_delete_i2c_busses(rinfo);
-#endif
+#endif
fb_dealloc_cmap(&info->cmap);
framebuffer_release(info);
}
info->var.blue.offset = 0;
info->var.red.length = info->var.green.length =
info->var.blue.length = 5;
-
+
} else {
/* p->var.bits_per_pixel == 8 */
write_cr(0x13, 100); // Set line length (doublewords)
write_xr(0x20, 0x00); // 8 bit blitter mode
info->fix.line_length = 800;
- info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
+ info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
info->var.red.offset = info->var.green.offset =
info->var.blue.offset = 0;
info->var.red.length = info->var.green.length =
info->var.blue.length = 8;
-
+
}
return 0;
}
* linux/drivers/video/i810_main.c -- Intel 810 frame buffer device
*
* Copyright (C) 2001 Antonino Daplas<adaplas@pol.net>
- * All Rights Reserved
+ * All Rights Reserved
*
* Contributors:
* Michael Vogt <mvogt@acm.org> - added support for Intel 815 chipsets
- * and enabling the power-on state of
- * external VGA connectors for
+ * and enabling the power-on state of
+ * external VGA connectors for
* secondary displays
*
* Fredrik Andersson <krueger@shell.linux.se> - alpha testing of
* timings support
*
* The code framework is a modification of vfb.c by Geert Uytterhoeven.
- * DotClock and PLL calculations are partly based on i810_driver.c
+ * DotClock and PLL calculations are partly based on i810_driver.c
* in xfree86 v4.0.3 by Precision Insight.
- * Watermark calculation and tables are based on i810_wmark.c
- * in xfre86 v4.0.3 by Precision Insight. Slight modifications
+ * Watermark calculation and tables are based on i810_wmark.c
+ * in xfre86 v4.0.3 by Precision Insight. Slight modifications
* only to allow for integer operations instead of floating point.
*
* This file is subject to the terms and conditions of the GNU General Public
* @mode: protect/unprotect
*
* DESCRIPTION:
- * The IBM VGA standard allows protection of certain VGA registers.
- * This will protect or unprotect them.
+ * The IBM VGA standard allows protection of certain VGA registers.
+ * This will protect or unprotect them.
*/
static void i810_protect_regs(u8 __iomem *mmio, int mode)
{
reg = i810_readb(CR_DATA_CGA, mmio);
reg = (mode == OFF) ? reg & ~0x80 :
reg | 0x80;
-
+
i810_writeb(CR_INDEX_CGA, mmio, CR11);
i810_writeb(CR_DATA_CGA, mmio, reg);
}
* @par: pointer to i810fb_par structure
*
* DESCRIPTION:
- * Loads the P, M, and N registers.
+ * Loads the P, M, and N registers.
*/
static void i810_load_pll(struct i810fb_par *par)
{
u32 tmp1, tmp2;
u8 __iomem *mmio = par->mmio_start_virtual;
-
+
tmp1 = par->regs.M | par->regs.N << 16;
tmp2 = i810_readl(DCLK_2D, mmio);
tmp2 &= ~MN_MASK;
i810_writel(DCLK_2D, mmio, tmp1 | tmp2);
-
+
tmp1 = par->regs.P;
tmp2 = i810_readl(DCLK_0DS, mmio);
tmp2 &= ~(P_OR << 16);
* Load values to VGA registers
*/
static void i810_load_vga(struct i810fb_par *par)
-{
+{
u8 __iomem *mmio = par->mmio_start_virtual;
/* interlace */
u8 tmp8;
u8 __iomem *mmio = par->mmio_start_virtual;
- i810_writel(FW_BLC, mmio, par->watermark);
+ i810_writel(FW_BLC, mmio, par->watermark);
tmp = i810_readl(PIXCONF, mmio);
tmp |= 1 | 1 << 20;
i810_writel(PIXCONF, mmio, tmp);
tmp8 |= 2;
i810_writeb(GR_INDEX, mmio, GR10);
i810_writeb(GR_DATA, mmio, tmp8);
-}
+}
/**
* i810_hires - enables high resolution mode
static void i810_hires(u8 __iomem *mmio)
{
u8 val;
-
+
i810_writeb(CR_INDEX_CGA, mmio, CR80);
val = i810_readb(CR_DATA_CGA, mmio);
i810_writeb(CR_INDEX_CGA, mmio, CR80);
*
* DESCRIPTION:
* Loads the characters per line
- */
+ */
static void i810_load_pitch(struct i810fb_par *par)
{
u32 tmp, pitch;
u8 val;
u8 __iomem *mmio = par->mmio_start_virtual;
-
+
pitch = par->pitch >> 3;
i810_writeb(SR_INDEX, mmio, SR01);
val = i810_readb(SR_DATA, mmio);
tmp = pitch & 0xFF;
i810_writeb(CR_INDEX_CGA, mmio, CR13);
i810_writeb(CR_DATA_CGA, mmio, (u8) tmp);
-
+
tmp = pitch >> 8;
i810_writeb(CR_INDEX_CGA, mmio, CR41);
val = i810_readb(CR_DATA_CGA, mmio) & ~0x0F;
/**
* i810_load_regs - loads all registers for the mode
* @par: pointer to i810fb_par structure
- *
+ *
* DESCRIPTION:
* Loads registers
*/
i810_load_pll(par);
i810_load_vga(par);
i810_load_vgax(par);
- i810_dram_off(mmio, ON);
+ i810_dram_off(mmio, ON);
i810_load_2d(par);
i810_hires(mmio);
i810_screen_off(mmio, ON);
i810_writeb(CLUT_INDEX_WRITE, mmio, regno);
i810_writeb(CLUT_DATA, mmio, red);
i810_writeb(CLUT_DATA, mmio, green);
- i810_writeb(CLUT_DATA, mmio, blue);
+ i810_writeb(CLUT_DATA, mmio, blue);
}
static void i810_read_dac(u8 regno, u8 *red, u8 *green, u8 *blue,
}
/************************************************************
- * VGA State Restore *
+ * VGA State Restore *
************************************************************/
static void i810_restore_pll(struct i810fb_par *par)
{
u32 tmp1, tmp2;
u8 __iomem *mmio = par->mmio_start_virtual;
-
+
tmp1 = par->hw_state.dclk_2d;
tmp2 = i810_readl(DCLK_2D, mmio);
tmp1 &= ~MN_MASK;
{
u8 i, j;
u8 __iomem *mmio = par->mmio_start_virtual;
-
+
for (i = 0; i < 4; i++) {
i810_writeb(CR_INDEX_CGA, mmio, CR30+i);
i810_writeb(CR_DATA_CGA, mmio, *(&(par->hw_state.cr30) + i));
{
u8 i;
u8 __iomem *mmio = par->mmio_start_virtual;
-
+
for (i = 0; i < 10; i++) {
i810_writeb(CR_INDEX_CGA, mmio, CR00 + i);
i810_writeb(CR_DATA_CGA, mmio, *((&par->hw_state.cr00) + i));
u8 __iomem *mmio = par->mmio_start_virtual;
tmp_word = i810_readw(BLTCNTL, mmio);
- tmp_word &= ~(3 << 4);
+ tmp_word &= ~(3 << 4);
tmp_word |= par->hw_state.bltcntl;
i810_writew(BLTCNTL, mmio, tmp_word);
-
+
i810_dram_off(mmio, OFF);
i810_writel(PIXCONF, mmio, par->hw_state.pixconf);
i810_dram_off(mmio, ON);
tmp_long |= par->hw_state.fw_blc;
i810_writel(FW_BLC, mmio, tmp_long);
- i810_writel(HWS_PGA, mmio, par->hw_state.hws_pga);
+ i810_writel(HWS_PGA, mmio, par->hw_state.hws_pga);
i810_writew(IER, mmio, par->hw_state.ier);
i810_writew(IMR, mmio, par->hw_state.imr);
i810_writel(DPLYSTAS, mmio, par->hw_state.dplystas);
i810_writeb(CR_INDEX_CGA, mmio, CR41);
par->hw_state.cr41 = i810_readb(CR_DATA_CGA, mmio);
i810_writeb(CR_INDEX_CGA, mmio, CR70);
- par->hw_state.cr70 = i810_readb(CR_DATA_CGA, mmio);
+ par->hw_state.cr70 = i810_readb(CR_DATA_CGA, mmio);
par->hw_state.msr = i810_readb(MSR_READ, mmio);
i810_writeb(CR_INDEX_CGA, mmio, CR80);
par->hw_state.cr80 = i810_readb(CR_DATA_CGA, mmio);
par->hw_state.pixconf = i810_readl(PIXCONF, mmio);
par->hw_state.fw_blc = i810_readl(FW_BLC, mmio);
par->hw_state.bltcntl = i810_readw(BLTCNTL, mmio);
- par->hw_state.hwstam = i810_readw(HWSTAM, mmio);
- par->hw_state.hws_pga = i810_readl(HWS_PGA, mmio);
+ par->hw_state.hwstam = i810_readw(HWSTAM, mmio);
+ par->hw_state.hws_pga = i810_readl(HWS_PGA, mmio);
par->hw_state.ier = i810_readw(IER, mmio);
par->hw_state.imr = i810_readw(IMR, mmio);
par->hw_state.dplystas = i810_readl(DPLYSTAS, mmio);
}
/************************************************************
- * Helpers *
+ * Helpers *
************************************************************/
/**
* get_line_length - calculates buffer pitch in bytes
* @bpp: bits per pixel
*
* DESCRIPTION:
- * Calculates buffer pitch in bytes.
+ * Calculates buffer pitch in bytes.
*/
static u32 get_line_length(struct i810fb_par *par, int xres_virtual, int bpp)
{
u32 length;
-
+
length = xres_virtual*bpp;
length = (length+31)&-32;
length >>= 3;
n_target_max = 30;
/*
- * find P such that target freq is 16x reference freq (Hz).
+ * find P such that target freq is 16x reference freq (Hz).
*/
p_divisor = 1;
p_target = 0;
- while(!((1000000 * p_divisor)/(16 * 24 * target_freq)) &&
+ while(!((1000000 * p_divisor)/(16 * 24 * target_freq)) &&
p_divisor <= 32) {
p_divisor <<= 1;
p_target++;
}
- n_reg = m_reg = n_target = 3;
+ n_reg = m_reg = n_target = 3;
while (diff_min && mod_min && (n_target < n_target_max)) {
f_out = (p_divisor * n_reg * 1000000)/(4 * 24 * m_reg);
mod = (p_divisor * n_reg * 1000000) % (4 * 24 * m_reg);
diff_min = diff;
n_best = n_target;
m_best = m_target;
- }
+ }
if (!diff && mod_min > mod) {
mod_min = mod;
n_best = n_target;
m_best = m_target;
}
- }
+ }
if (m) *m = (m_best - 2) & 0x3FF;
if (n) *n = (n_best - 2) & 0x3FF;
if (p) *p = (p_target << 4);
static void i810_enable_cursor(u8 __iomem *mmio, int mode)
{
u32 temp;
-
+
temp = i810_readl(PIXCONF, mmio);
temp = (mode == ON) ? temp | CURSOR_ENABLE_MASK :
temp & ~CURSOR_ENABLE_MASK;
int i, j;
for (i = 64; i--; ) {
- for (j = 0; j < 8; j++) {
- i810_writeb(j, addr, 0xff);
- i810_writeb(j+8, addr, 0x00);
- }
+ for (j = 0; j < 8; j++) {
+ i810_writeb(j, addr, 0xff);
+ i810_writeb(j+8, addr, 0x00);
+ }
addr +=16;
}
}
u8 __iomem *addr = par->cursor_heap.virtual;
int i, j, w = width/8;
int mod = width % 8, t_mask, d_mask;
-
+
t_mask = 0xff >> mod;
- d_mask = ~(0xff >> mod);
+ d_mask = ~(0xff >> mod);
for (i = height; i--; ) {
for (j = 0; j < w; j++) {
i810_writeb(j+0, addr, 0x00);
i810_enable_cursor(mmio, OFF);
i810_writel(CURBASE, mmio, par->cursor_heap.physical);
i810_writew(CURCNTR, mmio, COORD_ACTIVE | CURSOR_MODE_64_XOR);
-}
+}
/*********************************************************************
* Framebuffer hook helpers *
u32 xres, yres, vxres, vyres;
/*
- * Presently supports only these configurations
+ * Presently supports only these configurations
*/
xres = var->xres;
var->bits_per_pixel += 7;
var->bits_per_pixel &= ~7;
-
+
if (var->bits_per_pixel < 8)
var->bits_per_pixel = 8;
- if (var->bits_per_pixel > 32)
+ if (var->bits_per_pixel > 32)
var->bits_per_pixel = 32;
round_off_xres(&xres);
if (xres < 40)
xres = 40;
- if (xres > 2048)
+ if (xres > 2048)
xres = 2048;
xres = (xres + 7) & ~7;
- if (vxres < xres)
+ if (vxres < xres)
vxres = xres;
round_off_yres(&xres, &yres);
if (yres >= 2048)
yres = 2048;
- if (vyres < yres)
+ if (vyres < yres)
vyres = yres;
if (var->bits_per_pixel == 32)
var->hsync_len = (var->hsync_len + 4) & ~7;
if (var->vmode & FB_VMODE_INTERLACED) {
- if (!((yres + var->upper_margin + var->vsync_len +
+ if (!((yres + var->upper_margin + var->vsync_len +
var->lower_margin) & 1))
var->upper_margin++;
}
-
+
var->xres = xres;
var->yres = yres;
var->xres_virtual = vxres;
var->yres_virtual = vyres;
-}
+}
/**
* set_color_bitfields - sets rgba fields
* @var: pointer to fb_var_screeninfo
*
* DESCRIPTION:
- * The length, offset and ordering for each color field
- * (red, green, blue) will be set as specified
+ * The length, offset and ordering for each color field
+ * (red, green, blue) will be set as specified
* by the hardware
- */
+ */
static void set_color_bitfields(struct fb_var_screeninfo *var)
{
switch (var->bits_per_pixel) {
- case 8:
+ case 8:
var->red.offset = 0;
var->red.length = 8;
var->green.offset = 0;
* @info: pointer to fb_info
*
* DESCRIPTION:
- * This will check if the framebuffer size is sufficient
- * for the current mode and if the user's monitor has the
+ * This will check if the framebuffer size is sufficient
+ * for the current mode and if the user's monitor has the
* required specifications to display the current mode.
*/
-static int i810_check_params(struct fb_var_screeninfo *var,
+static int i810_check_params(struct fb_var_screeninfo *var,
struct fb_info *info)
{
struct i810fb_par *par = info->par;
vyres = info->var.yres;
vxres = par->fb.size/vyres;
vxres /= var->bits_per_pixel >> 3;
- line_length = get_line_length(par, vxres,
+ line_length = get_line_length(par, vxres,
var->bits_per_pixel);
vidmem = line_length * info->var.yres;
if (vxres < var->xres) {
printk("i810fb: required video memory, "
"%d bytes, for %dx%d-%d (virtual) "
- "is out of range\n",
- vidmem, vxres, vyres,
+ "is out of range\n",
+ vidmem, vxres, vyres,
var->bits_per_pixel);
return -ENOMEM;
}
}
return retval;
-}
+}
/**
* encode_fix - fill up fb_fix_screeninfo structure
*
* DESCRIPTION:
* Based on the contents of @var, @par will be dynamically filled up.
- * @par contains all information necessary to modify the hardware.
+ * @par contains all information necessary to modify the hardware.
*/
-static void decode_var(const struct fb_var_screeninfo *var,
+static void decode_var(const struct fb_var_screeninfo *var,
struct i810fb_par *par)
{
u32 xres, yres, vxres, vyres;
if (var->nonstd && var->bits_per_pixel != 8)
par->pixconf |= 1 << 27;
- i810_calc_dclk(var->pixclock, &par->regs.M,
+ i810_calc_dclk(var->pixclock, &par->regs.M,
&par->regs.N, &par->regs.P);
i810fb_encode_registers(var, par, xres, yres);
par->watermark = i810_get_watermark(var, par);
par->pitch = get_line_length(par, vxres, var->bits_per_pixel);
-}
+}
/**
* i810fb_getcolreg - gets red, green and blue values of the hardware DAC
* Gets the red, green and blue values of the hardware DAC as pointed by @regno
* and writes them to @red, @green and @blue respectively
*/
-static int i810fb_getcolreg(u8 regno, u8 *red, u8 *green, u8 *blue,
+static int i810fb_getcolreg(u8 regno, u8 *red, u8 *green, u8 *blue,
u8 *transp, struct fb_info *info)
{
struct i810fb_par *par = info->par;
temp = i810_readb(PIXCONF1, mmio);
i810_writeb(PIXCONF1, mmio, temp & ~EXTENDED_PALETTE);
- if (info->fix.visual == FB_VISUAL_DIRECTCOLOR &&
- info->var.green.length == 5)
+ if (info->fix.visual == FB_VISUAL_DIRECTCOLOR &&
+ info->var.green.length == 5)
i810_read_dac(regno * 8, red, green, blue, mmio);
- else if (info->fix.visual == FB_VISUAL_DIRECTCOLOR &&
+ else if (info->fix.visual == FB_VISUAL_DIRECTCOLOR &&
info->var.green.length == 6) {
u8 tmp;
i810_read_dac(regno * 8, red, &tmp, blue, mmio);
i810_read_dac(regno * 4, &tmp, green, &tmp, mmio);
}
- else
+ else
i810_read_dac(regno, red, green, blue, mmio);
*transp = 0;
return 0;
}
-/******************************************************************
+/******************************************************************
* Framebuffer device-specific hooks *
******************************************************************/
par->use_count++;
mutex_unlock(&par->open_lock);
-
+
return 0;
}
par->use_count--;
mutex_unlock(&par->open_lock);
-
+
return 0;
}
-static int i810fb_setcolreg(unsigned regno, unsigned red, unsigned green,
- unsigned blue, unsigned transp,
+static int i810fb_setcolreg(unsigned regno, unsigned red, unsigned green,
+ unsigned blue, unsigned transp,
struct fb_info *info)
{
struct i810fb_par *par = info->par;
temp = i810_readb(PIXCONF1, mmio);
i810_writeb(PIXCONF1, mmio, temp & ~EXTENDED_PALETTE);
- if (info->fix.visual == FB_VISUAL_DIRECTCOLOR &&
+ if (info->fix.visual == FB_VISUAL_DIRECTCOLOR &&
info->var.green.length == 5) {
- for (i = 0; i < 8; i++)
- i810_write_dac((u8) (regno * 8) + i, (u8) red,
+ for (i = 0; i < 8; i++)
+ i810_write_dac((u8) (regno * 8) + i, (u8) red,
(u8) green, (u8) blue, mmio);
- } else if (info->fix.visual == FB_VISUAL_DIRECTCOLOR &&
+ } else if (info->fix.visual == FB_VISUAL_DIRECTCOLOR &&
info->var.green.length == 6) {
u8 r, g, b;
if (regno < 32) {
- for (i = 0; i < 8; i++)
+ for (i = 0; i < 8; i++)
i810_write_dac((u8) (regno * 8) + i,
- (u8) red, (u8) green,
+ (u8) red, (u8) green,
(u8) blue, mmio);
}
i810_read_dac((u8) (regno*4), &r, &g, &b, mmio);
- for (i = 0; i < 4; i++)
- i810_write_dac((u8) (regno*4) + i, r, (u8) green,
+ for (i = 0; i < 4; i++)
+ i810_write_dac((u8) (regno*4) + i, r, (u8) green,
b, mmio);
} else if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR) {
i810_write_dac((u8) regno, (u8) red, (u8) green,
if (regno < 16) {
switch (info->var.bits_per_pixel) {
- case 16:
+ case 16:
if (info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
- if (info->var.green.length == 5)
- ((u32 *)info->pseudo_palette)[regno] =
+ if (info->var.green.length == 5)
+ ((u32 *)info->pseudo_palette)[regno] =
(regno << 10) | (regno << 5) |
regno;
else
- ((u32 *)info->pseudo_palette)[regno] =
+ ((u32 *)info->pseudo_palette)[regno] =
(regno << 11) | (regno << 5) |
regno;
} else {
if (info->var.green.length == 5) {
/* RGB 555 */
- ((u32 *)info->pseudo_palette)[regno] =
+ ((u32 *)info->pseudo_palette)[regno] =
((red & 0xf800) >> 1) |
((green & 0xf800) >> 6) |
((blue & 0xf800) >> 11);
break;
case 24: /* RGB 888 */
case 32: /* RGBA 8888 */
- if (info->fix.visual == FB_VISUAL_DIRECTCOLOR)
- ((u32 *)info->pseudo_palette)[regno] =
+ if (info->fix.visual == FB_VISUAL_DIRECTCOLOR)
+ ((u32 *)info->pseudo_palette)[regno] =
(regno << 16) | (regno << 8) |
regno;
- else
- ((u32 *)info->pseudo_palette)[regno] =
+ else
+ ((u32 *)info->pseudo_palette)[regno] =
((red & 0xff00) << 8) |
(green & 0xff00) |
((blue & 0xff00) >> 8);
return 0;
}
-static int i810fb_pan_display(struct fb_var_screeninfo *var,
+static int i810fb_pan_display(struct fb_var_screeninfo *var,
struct fb_info *info)
{
struct i810fb_par *par = info->par;
u32 total;
-
- total = var->xoffset * par->depth +
+
+ total = var->xoffset * par->depth +
var->yoffset * info->fix.line_length;
i810fb_load_front(total, info);
struct i810fb_par *par = info->par;
u8 __iomem *mmio = par->mmio_start_virtual;
int mode = 0, pwr, scr_off = 0;
-
+
pwr = i810_readl(PWR_CLKC, mmio);
switch (blank_mode) {
scr_off = OFF;
break;
default:
- return -EINVAL;
+ return -EINVAL;
}
i810_screen_off(mmio, scr_off);
return 0;
}
-static int i810fb_check_var(struct fb_var_screeninfo *var,
+static int i810fb_check_var(struct fb_var_screeninfo *var,
struct fb_info *info)
{
int err;
.fb_set_par = i810fb_set_par,
.fb_setcolreg = i810fb_setcolreg,
.fb_blank = i810fb_blank,
- .fb_pan_display = i810fb_pan_display,
+ .fb_pan_display = i810fb_pan_display,
.fb_fillrect = i810fb_fillrect,
.fb_copyarea = i810fb_copyarea,
.fb_imageblit = i810fb_imageblit,
return 0;
}
-static int i810fb_resume(struct pci_dev *dev)
+static int i810fb_resume(struct pci_dev *dev)
{
struct fb_info *info = pci_get_drvdata(dev);
struct i810fb_par *par = info->par;
/***********************************************************************
* AGP resource allocation *
***********************************************************************/
-
+
static void i810_fix_pointers(struct i810fb_par *par)
{
par->fb.physical = par->aperture.physical+(par->fb.offset << 12);
par->fb.virtual = par->aperture.virtual+(par->fb.offset << 12);
- par->iring.physical = par->aperture.physical +
+ par->iring.physical = par->aperture.physical +
(par->iring.offset << 12);
- par->iring.virtual = par->aperture.virtual +
+ par->iring.virtual = par->aperture.virtual +
(par->iring.offset << 12);
par->cursor_heap.virtual = par->aperture.virtual+
(par->cursor_heap.offset << 12);
struct i810fb_par *par = info->par;
int size;
struct agp_bridge_data *bridge;
-
+
i810_fix_offsets(par);
size = par->fb.size + par->iring.size;
printk("i810fb_alloc_fbmem: cannot acquire agpgart\n");
return -ENODEV;
}
- if (!(par->i810_gtt.i810_fb_memory =
+ if (!(par->i810_gtt.i810_fb_memory =
agp_allocate_memory(bridge, size >> 12, AGP_NORMAL_MEMORY))) {
printk("i810fb_alloc_fbmem: can't allocate framebuffer "
"memory\n");
printk("i810fb_alloc_fbmem: can't bind framebuffer memory\n");
agp_backend_release(bridge);
return -EBUSY;
- }
-
- if (!(par->i810_gtt.i810_cursor_memory =
+ }
+
+ if (!(par->i810_gtt.i810_cursor_memory =
agp_allocate_memory(bridge, par->cursor_heap.size >> 12,
AGP_PHYSICAL_MEMORY))) {
printk("i810fb_alloc_cursormem: can't allocate "
printk("i810fb_alloc_cursormem: cannot bind cursor memory\n");
agp_backend_release(bridge);
return -EBUSY;
- }
+ }
par->cursor_heap.physical = par->i810_gtt.i810_cursor_memory->physical;
return 0;
}
-/***************************************************************
- * Initialization *
+/***************************************************************
+ * Initialization *
***************************************************************/
/**
{
if (!hsync1)
hsync1 = HFMIN;
- if (!hsync2)
+ if (!hsync2)
hsync2 = HFMAX;
if (!info->monspecs.hfmax)
info->monspecs.hfmax = hsync2;
if (!vsync1)
vsync1 = VFMIN;
- if (!vsync2)
+ if (!vsync2)
vsync2 = VFMAX;
if (IS_DVT && vsync1 < 60)
vsync1 = 60;
info->monspecs.vfmax = vsync2;
if (!info->monspecs.vfmin)
info->monspecs.vfmin = vsync1;
- if (vsync2 < vsync1)
+ if (vsync2 < vsync1)
info->monspecs.vfmin = vsync2;
}
{
mutex_init(&par->open_lock);
- if (voffset)
+ if (voffset)
v_offset_default = voffset;
else if (par->aperture.size > 32 * 1024 * 1024)
v_offset_default = 16;
else
v_offset_default = 8;
- if (!vram)
+ if (!vram)
vram = 1;
- if (accel)
+ if (accel)
par->dev_flags |= HAS_ACCELERATION;
- if (sync)
+ if (sync)
par->dev_flags |= ALWAYS_SYNC;
par->ddc_num = (ddc3 ? 3 : 2);
if (bpp < 8)
bpp = 8;
-
+
par->i810fb_ops = i810fb_ops;
if (xres)
else
info->var.yres = 480;
- if (!vyres)
+ if (!vyres)
vyres = (vram << 20)/(info->var.xres*bpp >> 3);
info->var.yres_virtual = vyres;
if (dcolor)
info->var.nonstd = 1;
- if (par->dev_flags & HAS_ACCELERATION)
+ if (par->dev_flags & HAS_ACCELERATION)
info->var.accel_flags = 1;
i810_init_monspecs(info);
}
-
+
/**
* i810_init_device - initialize device
* @par: pointer to i810fb_par structure
{
int err;
- if ((err = pci_enable_device(par->dev))) {
+ if ((err = pci_enable_device(par->dev))) {
printk("i810fb_init: cannot enable device\n");
- return err;
+ return err;
}
par->res_flags |= PCI_DEVICE_ENABLED;
return -ENOMEM;
}
- if (!request_mem_region(par->aperture.physical,
- par->aperture.size,
+ if (!request_mem_region(par->aperture.physical,
+ par->aperture.size,
i810_pci_list[entry->driver_data])) {
printk("i810fb_init: cannot request framebuffer region\n");
return -ENODEV;
printk("i810fb_init: cannot remap framebuffer region\n");
return -ENODEV;
}
-
- if (!request_mem_region(par->mmio_start_phys,
- MMIO_SIZE,
+
+ if (!request_mem_region(par->mmio_start_phys,
+ MMIO_SIZE,
i810_pci_list[entry->driver_data])) {
printk("i810fb_init: cannot request mmio region\n");
return -ENODEV;
}
par->res_flags |= MMIO_REQ;
- par->mmio_start_virtual = ioremap(par->mmio_start_phys,
+ par->mmio_start_virtual = ioremap(par->mmio_start_phys,
MMIO_SIZE);
if (!par->mmio_start_virtual) {
printk("i810fb_init: cannot remap mmio region\n");
if (!options || !*options)
return 0;
-
+
while ((this_opt = strsep(&options, ",")) != NULL) {
if (!strncmp(this_opt, "mtrr", 4))
mtrr = true;
bpp = simple_strtoul(this_opt+4, NULL, 0);
else if (!strncmp(this_opt, "hsync1:", 7)) {
hsync1 = simple_strtoul(this_opt+7, &suffix, 0);
- if (strncmp(suffix, "H", 1))
+ if (strncmp(suffix, "H", 1))
hsync1 *= 1000;
} else if (!strncmp(this_opt, "hsync2:", 7)) {
hsync2 = simple_strtoul(this_opt+7, &suffix, 0);
- if (strncmp(suffix, "H", 1))
+ if (strncmp(suffix, "H", 1))
hsync2 *= 1000;
- } else if (!strncmp(this_opt, "vsync1:", 7))
+ } else if (!strncmp(this_opt, "vsync1:", 7))
vsync1 = simple_strtoul(this_opt+7, NULL, 0);
else if (!strncmp(this_opt, "vsync2:", 7))
vsync2 = simple_strtoul(this_opt+7, NULL, 0);
return err;
}
- i810_init_device(par);
+ i810_init_device(par);
info->screen_base = par->fb.virtual;
info->fbops = &par->i810fb_ops;
err = register_framebuffer(info);
if (err < 0) {
- i810fb_release_resource(info, par);
+ i810fb_release_resource(info, par);
printk("i810fb_init: cannot register framebuffer device\n");
- return err;
- }
+ return err;
+ }
pci_set_drvdata(dev, info);
pixclock = 1000000000/(info->var.pixclock);
pixclock *= 1000;
- hfreq = pixclock/(info->var.xres + info->var.left_margin +
+ hfreq = pixclock/(info->var.xres + info->var.left_margin +
info->var.hsync_len + info->var.right_margin);
vfreq = hfreq/(info->var.yres + info->var.upper_margin +
info->var.vsync_len + info->var.lower_margin);
printk("I810FB: fb%d : %s v%d.%d.%d%s\n"
- "I810FB: Video RAM : %dK\n"
+ "I810FB: Video RAM : %dK\n"
"I810FB: Monitor : H: %d-%d KHz V: %d-%d Hz\n"
"I810FB: Mode : %dx%d-%dbpp@%dHz\n",
info->node,
VERSION_MAJOR, VERSION_MINOR, VERSION_TEENIE, BRANCH_VERSION,
(int) par->fb.size>>10, info->monspecs.hfmin/1000,
info->monspecs.hfmax/1000, info->monspecs.vfmin,
- info->monspecs.vfmax, info->var.xres,
+ info->monspecs.vfmax, info->var.xres,
info->var.yres, info->var.bits_per_pixel, vfreq);
return 0;
}
* De-initialization *
***************************************************************/
-static void i810fb_release_resource(struct fb_info *info,
+static void i810fb_release_resource(struct fb_info *info,
struct i810fb_par *par)
{
struct gtt_data *gtt = &par->i810_gtt;
struct fb_info *info = pci_get_drvdata(dev);
struct i810fb_par *par = info->par;
- unregister_framebuffer(info);
+ unregister_framebuffer(info);
i810fb_release_resource(info, par);
printk("cleanup_module: unloaded i810 framebuffer device\n");
-}
+}
#ifndef MODULE
static int i810fb_init(void)
return pci_register_driver(&i810fb_driver);
}
-#endif
+#endif
/*********************************************************************
* Modularization *
}
module_param(vram, int, 0);
-MODULE_PARM_DESC(vram, "System RAM to allocate to framebuffer in MiB"
+MODULE_PARM_DESC(vram, "System RAM to allocate to framebuffer in MiB"
" (default=4)");
module_param(voffset, int, 0);
MODULE_PARM_DESC(voffset, "at what offset to place start of framebuffer "
MODULE_PARM_DESC(vsync1, "Minimum vertical frequency of monitor in Hz"
" (default = 50)");
module_param(vsync2, int, 0);
-MODULE_PARM_DESC(vsync2, "Maximum vertical frequency of monitor in Hz"
+MODULE_PARM_DESC(vsync2, "Maximum vertical frequency of monitor in Hz"
" (default = 60)");
module_param(accel, bool, 0);
MODULE_PARM_DESC(accel, "Use Acceleration (BLIT) engine (default = 0)");
MODULE_AUTHOR("Tony A. Daplas");
MODULE_DESCRIPTION("Framebuffer device for the Intel 810/815 and"
" compatible cards");
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL");
static void __exit i810fb_exit(void)
{
SSTATUS = 36, /* 0x90 */
PRC = 37, /* 0x94 */
-#if 0
+#if 0
/* PCI Registers */
DVID = 0x00000000L,
SC = 0x00000004L,
PDATA = 0x04,
PPMASK = 0x08,
PADDRR = 0x0c,
- PIDXLO = 0x10,
- PIDXHI = 0x14,
+ PIDXLO = 0x10,
+ PIDXHI = 0x14,
PIDXDATA= 0x18,
PIDXCTL = 0x1c
};
SYSCLKC = 0x18, /* () System Clock C */
/*
* Dot clock rate is 20MHz * (m + 1) / ((n + 1) * (p ? 2 * p : 1)
- * c is charge pump bias which depends on the VCO frequency
+ * c is charge pump bias which depends on the VCO frequency
*/
PIXM0 = 0x20, /* () Pixel M 0 */
PIXN0 = 0x21, /* () Pixel N 0 */
__u32 ramdac;
__u32 palette[16];
};
-
+
enum {
IBM = 0,
TVP = 1
static struct imstt_regvals tvp_reg_init_18 = {
1152,
- 0x0009, 0x0011, 0x059, 0x5b, 0x0003, 0x0031, 0x0397, 0x039a, 0x0000,
+ 0x0009, 0x0011, 0x059, 0x5b, 0x0003, 0x0031, 0x0397, 0x039a, 0x0000,
0xfd, 0x3a, 0xf1,
{ 0x39, 0x38, 0x38 }, { 0xf3, 0xf3, 0xf2 }
};
}
static int
-imsttfb_set_par(struct fb_info *info)
+imsttfb_set_par(struct fb_info *info)
{
struct imstt_par *par = info->par;
-
+
if (!compute_imstt_regvals(par, info->var.xres, info->var.yres))
return -EINVAL;
return 0;
}
-static int
+static int
imsttfb_blank(int blank, struct fb_info *info)
{
struct imstt_par *par = info->par;
static void
imsttfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
-{
+{
struct imstt_par *par = info->par;
__u32 Bpp, line_pitch, bgc, dx, dy, width, height;
}
}
-static int
+static int
imsttfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
{
struct imstt_par *par = info->par;
if (cursor->dest == NULL && cursor->rop == ROP_XOR)
return 1;
-
+
imstt_set_cursor(info, cursor, 0);
if (flags & FB_CUR_SETPOS) {
struct fb_info *info;
struct device_node *dp;
int ret = -ENOMEM;
-
+
dp = pci_device_to_OF_node(pdev);
if(dp)
printk(KERN_INFO "%s: OF name %pOFn\n",__func__, dp);
#endif
return pci_register_driver(&imsttfb_pci_driver);
}
-
+
static void __exit imsttfb_exit(void)
{
pci_unregister_driver(&imsttfb_pci_driver);
*
* 0.3.3
* - Porting over to new fbdev api. (jsimmons)
- *
+ *
* 0.3.2
- * - got rid of all floating point (dok)
+ * - got rid of all floating point (dok)
*
* 0.3.1
* - added module license (dok)
switch (info->fix.accel) {
case FB_ACCEL_NEOMAGIC_NM2200:
- case FB_ACCEL_NEOMAGIC_NM2230:
- case FB_ACCEL_NEOMAGIC_NM2360:
- case FB_ACCEL_NEOMAGIC_NM2380:
+ case FB_ACCEL_NEOMAGIC_NM2230:
+ case FB_ACCEL_NEOMAGIC_NM2360:
+ case FB_ACCEL_NEOMAGIC_NM2380:
neo2200_accel_init(info, &info->var);
break;
default:
break;
- }
+ }
return 0;
}
{
switch (info->fix.accel) {
case FB_ACCEL_NEOMAGIC_NM2200:
- case FB_ACCEL_NEOMAGIC_NM2230:
- case FB_ACCEL_NEOMAGIC_NM2360:
+ case FB_ACCEL_NEOMAGIC_NM2230:
+ case FB_ACCEL_NEOMAGIC_NM2360:
case FB_ACCEL_NEOMAGIC_NM2380:
neo2200_fillrect(info, rect);
break;
default:
cfb_fillrect(info, rect);
break;
- }
+ }
}
static void
{
switch (info->fix.accel) {
case FB_ACCEL_NEOMAGIC_NM2200:
- case FB_ACCEL_NEOMAGIC_NM2230:
- case FB_ACCEL_NEOMAGIC_NM2360:
- case FB_ACCEL_NEOMAGIC_NM2380:
+ case FB_ACCEL_NEOMAGIC_NM2230:
+ case FB_ACCEL_NEOMAGIC_NM2360:
+ case FB_ACCEL_NEOMAGIC_NM2380:
neo2200_copyarea(info, area);
break;
default:
cfb_copyarea(info, area);
break;
- }
+ }
}
static void
}
}
-static int
+static int
neofb_sync(struct fb_info *info)
{
switch (info->fix.accel) {
case FB_ACCEL_NEOMAGIC_NM2200:
- case FB_ACCEL_NEOMAGIC_NM2230:
- case FB_ACCEL_NEOMAGIC_NM2360:
- case FB_ACCEL_NEOMAGIC_NM2380:
+ case FB_ACCEL_NEOMAGIC_NM2230:
+ case FB_ACCEL_NEOMAGIC_NM2360:
+ case FB_ACCEL_NEOMAGIC_NM2380:
neo2200_sync(info);
break;
default:
break;
}
- return 0;
+ return 0;
}
/*
* DESCRIPTiON:
* Loads cursor image based on a monochrome source and mask bitmap. The
* image bits determines the color of the pixel, 0 for background, 1 for
- * foreground. Only the affected region (as determined by @w and @h
+ * foreground. Only the affected region (as determined by @w and @h
* parameters) will be updated.
*
* CALLED FROM:
for (i = 0; i < h; i++) {
b = *data++;
reverse_order(&b);
-
+
for (j = 0; j < w/2; j++) {
tmp = 0;
#if defined (__BIG_ENDIAN)
unsigned char regnum, unsigned char *red,
unsigned char *green, unsigned char *blue)
{
-
+
VGA_WR08(chip->PDIO, 0x3c7, regnum);
*red = VGA_RD08(chip->PDIO, 0x3c9);
*green = VGA_RD08(chip->PDIO, 0x3c9);
int rc;
struct riva_par *par = info->par;
struct riva_regs newmode;
-
+
NVTRACE_ENTER();
/* time to calculate */
rivafb_blank(FB_BLANK_NORMAL, info);
hBlankEnd = hTotal + 4;
}
- newmode.crtc[0x0] = Set8Bits (hTotal);
+ newmode.crtc[0x0] = Set8Bits (hTotal);
newmode.crtc[0x1] = Set8Bits (hDisplay);
newmode.crtc[0x2] = Set8Bits (hBlankStart);
newmode.crtc[0x3] = SetBitField (hBlankEnd, 4: 0, 4:0) | SetBit (7);
| SetBitField(vStart,10:10,2:2)
| SetBitField(vDisplay,10:10,1:1)
| SetBitField(vTotal,10:10,0:0);
- newmode.ext.horiz = SetBitField(hTotal,8:8,0:0)
+ newmode.ext.horiz = SetBitField(hTotal,8:8,0:0)
| SetBitField(hDisplay,8:8,1:1)
| SetBitField(hBlankStart,8:8,2:2)
| SetBitField(hStart,8:8,3:3);
newmode.ext.extra = SetBitField(vTotal,11:11,0:0)
| SetBitField(vDisplay,11:11,2:2)
| SetBitField(vStart,11:11,4:4)
- | SetBitField(vBlankStart,11:11,6:6);
+ | SetBitField(vBlankStart,11:11,6:6);
if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
int tmp = (hTotal >> 1) & ~1;
newmode.ext.interlace = Set8Bits(tmp);
newmode.ext.horiz |= SetBitField(tmp, 8:8,4:4);
- } else
+ } else
newmode.ext.interlace = 0xff; /* interlace off */
if (par->riva.Architecture >= NV_ARCH_10)
if (info->var.sync & FB_SYNC_VERT_HIGH_ACT)
newmode.misc_output &= ~0x80;
else
- newmode.misc_output |= 0x80;
+ newmode.misc_output |= 0x80;
rc = CalcStateExt(&par->riva, &newmode.ext, par->pdev, bpp, width,
hDisplaySize, height, dotClock);
}
/**
- * rivafb_do_maximize -
+ * rivafb_do_maximize -
* @info: pointer to fb_info object containing info for current riva board
* @var: standard kernel fb changeable data
* @nom: nom
*
* RETURNS:
* -EINVAL on failure, 0 on success
- *
+ *
*
* CALLED FROM:
* rivafb_check_var()
return -EINVAL;
}
}
-
+
if (var->xres_virtual * nom / den >= 8192) {
printk(KERN_WARNING PFX
"virtual X resolution (%d) is too high, lowering to %d\n",
var->xres_virtual, 8192 * den / nom - 16);
var->xres_virtual = 8192 * den / nom - 16;
}
-
+
if (var->xres_virtual < var->xres) {
printk(KERN_ERR PFX
"virtual X resolution (%d) is smaller than real\n", var->xres_virtual);
break;
case 6:
rc = 64; /* 64 entries (2^6), 16 bpp, RGB565 */
- break;
+ break;
default:
/* should not occur */
break;
/* vgaHWunlock() + riva unlock (0x7F) */
CRTCout(par, 0x11, 0xFF);
par->riva.LockUnlock(&par->riva, 0);
-
+
riva_save_state(par, &par->initial_state);
}
par->ref_count++;
struct riva_par *par = info->par;
int nom, den; /* translating from pixels->bytes */
int mode_valid = 0;
-
+
NVTRACE_ENTER();
if (!var->pixclock)
return -EINVAL;
if (var->yoffset > var->yres_virtual - var->yres)
var->yoffset = var->yres_virtual - var->yres - 1;
- var->red.msb_right =
+ var->red.msb_right =
var->green.msb_right =
var->blue.msb_right =
var->transp.offset = var->transp.length = var->transp.msb_right = 0;
goto out;
if(!(info->flags & FBINFO_HWACCEL_DISABLED))
riva_setup_accel(info);
-
+
par->cursor_reset = 1;
info->fix.line_length = (info->var.xres_virtual * (info->var.bits_per_pixel >> 3));
info->fix.visual = (info->var.bits_per_pixel == 8) ?
* CALLED FROM:
* framebuffer hook
*/
-static void rivafb_imageblit(struct fb_info *info,
+static void rivafb_imageblit(struct fb_info *info,
const struct fb_image *image)
{
struct riva_par *par = info->par;
bgx = par->palette[image->bg_color];
}
if (info->var.green.length == 6)
- convert_bgcolor_16(&bgx);
+ convert_bgcolor_16(&bgx);
break;
}
u8 *dat = (u8 *) cursor->image.data;
u8 *msk = (u8 *) cursor->mask;
u8 *src;
-
+
src = kmalloc_array(s_pitch, cursor->image.height, GFP_ATOMIC);
if (src) {
.fb_fillrect = rivafb_fillrect,
.fb_copyarea = rivafb_copyarea,
.fb_imageblit = rivafb_imageblit,
- .fb_cursor = rivafb_cursor,
+ .fb_cursor = rivafb_cursor,
.fb_sync = rivafb_sync,
};
info->pseudo_palette = par->pseudo_palette;
cmap_len = riva_get_cmap_len(&info->var);
- fb_alloc_cmap(&info->cmap, cmap_len, 0);
+ fb_alloc_cmap(&info->cmap, cmap_len, 0);
info->pixmap.size = 8 * 1024;
info->pixmap.buf_align = 4;
default_par->Chipset = (pd->vendor << 16) | pd->device;
printk(KERN_INFO PFX "nVidia device/chipset %X\n",default_par->Chipset);
-
+
if(default_par->riva.Architecture == 0) {
printk(KERN_ERR PFX "unknown NV_ARCH\n");
ret=-ENODEV;
if (flatpanel == 1)
printk(KERN_INFO PFX "flatpanel support enabled\n");
default_par->forceCRTC = forceCRTC;
-
+
rivafb_fix.mmio_len = pci_resource_len(pd, 0);
rivafb_fix.smem_len = pci_resource_len(pd, 1);
cmd |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
pci_write_config_word(pd, PCI_COMMAND, cmd);
}
-
+
rivafb_fix.mmio_start = pci_resource_start(pd, 0);
rivafb_fix.smem_start = pci_resource_start(pd, 1);
#endif
iounmap(info->screen_base);
err_iounmap_pramin:
- if (default_par->riva.Architecture == NV_ARCH_03)
+ if (default_par->riva.Architecture == NV_ARCH_03)
iounmap(default_par->riva.PRAMIN);
err_iounmap_ctrl_base:
iounmap(default_par->ctrl_base);
{
struct fb_info *info = pci_get_drvdata(pd);
struct riva_par *par = info->par;
-
+
NVTRACE_ENTER();
#ifdef CONFIG_FB_RIVA_I2C
while ((this_opt = strsep(&options, ",")) != NULL) {
if (!strncmp(this_opt, "forceCRTC", 9)) {
char *p;
-
+
p = this_opt + 9;
- if (!*p || !*(++p)) continue;
+ if (!*p || !*(++p)) continue;
forceCRTC = *p - '0';
- if (forceCRTC < 0 || forceCRTC > 1)
+ if (forceCRTC < 0 || forceCRTC > 1)
forceCRTC = -1;
} else if (!strncmp(this_opt, "flatpanel", 9)) {
flatpanel = 1;
* The primary goal is to remove the console code from fbdev and place it
* into fbcon.c. This reduces the code and makes writing a new fbdev driver
* easy since the author doesn't need to worry about console internals. It
- * also allows the ability to run fbdev without a console/tty system on top
- * of it.
+ * also allows the ability to run fbdev without a console/tty system on top
+ * of it.
*
* First the roles of struct fb_info and struct display have changed. Struct
* display will go away. The way the new framebuffer console code will
- * work is that it will act to translate data about the tty/console in
+ * work is that it will act to translate data about the tty/console in
* struct vc_data to data in a device independent way in struct fb_info. Then
- * various functions in struct fb_ops will be called to store the device
- * dependent state in the par field in struct fb_info and to change the
+ * various functions in struct fb_ops will be called to store the device
+ * dependent state in the par field in struct fb_info and to change the
* hardware to that state. This allows a very clean separation of the fbdev
* layer from the console layer. It also allows one to use fbdev on its own
- * which is a bounus for embedded devices. The reason this approach works is
+ * which is a bounus for embedded devices. The reason this approach works is
* for each framebuffer device when used as a tty/console device is allocated
- * a set of virtual terminals to it. Only one virtual terminal can be active
- * per framebuffer device. We already have all the data we need in struct
+ * a set of virtual terminals to it. Only one virtual terminal can be active
+ * per framebuffer device. We already have all the data we need in struct
* vc_data so why store a bunch of colormaps and other fbdev specific data
- * per virtual terminal.
+ * per virtual terminal.
*
* As you can see doing this makes the con parameter pretty much useless
- * for struct fb_ops functions, as it should be. Also having struct
- * fb_var_screeninfo and other data in fb_info pretty much eliminates the
+ * for struct fb_ops functions, as it should be. Also having struct
+ * fb_var_screeninfo and other data in fb_info pretty much eliminates the
* need for get_fix and get_var. Once all drivers use the fix, var, and cmap
* fbcon can be written around these fields. This will also eliminate the
* need to regenerate struct fb_var_screeninfo, struct fb_fix_screeninfo
* struct fb_cmap every time get_var, get_fix, get_cmap functions are called
- * as many drivers do now.
+ * as many drivers do now.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive for
static char *mode_option;
/*
- * If your driver supports multiple boards, you should make the
- * below data types arrays, or allocate them dynamically (using kmalloc()).
- */
+ * If your driver supports multiple boards, you should make the
+ * below data types arrays, or allocate them dynamically (using kmalloc()).
+ */
-/*
+/*
* This structure defines the hardware state of the graphics card. Normally
* you place this in a header file in linux/include/video. This file usually
* also includes register information. That allows other driver subsystems
- * and userland applications the ability to use the same header file to
- * avoid duplicate work and easy porting of software.
+ * and userland applications the ability to use the same header file to
+ * avoid duplicate work and easy porting of software.
*/
struct xxx_par;
/*
* Here we define the default structs fb_fix_screeninfo and fb_var_screeninfo
* if we don't use modedb. If we do use modedb see xxxfb_init how to use it
- * to get a fb_var_screeninfo. Otherwise define a default var as well.
+ * to get a fb_var_screeninfo. Otherwise define a default var as well.
*/
static const struct fb_fix_screeninfo xxxfb_fix = {
- .id = "FB's name",
+ .id = "FB's name",
.type = FB_TYPE_PACKED_PIXELS,
.visual = FB_VISUAL_PSEUDOCOLOR,
.xpanstep = 1,
.ypanstep = 1,
- .ywrapstep = 1,
+ .ywrapstep = 1,
.accel = FB_ACCEL_NONE,
};
/*
- * Modern graphical hardware not only supports pipelines but some
+ * Modern graphical hardware not only supports pipelines but some
* also support multiple monitors where each display can have
- * its own unique data. In this case each display could be
- * represented by a separate framebuffer device thus a separate
+ * its own unique data. In this case each display could be
+ * represented by a separate framebuffer device thus a separate
* struct fb_info. Now the struct xxx_par represents the graphics
- * hardware state thus only one exist per card. In this case the
- * struct xxx_par for each graphics card would be shared between
- * every struct fb_info that represents a framebuffer on that card.
- * This allows when one display changes it video resolution (info->var)
+ * hardware state thus only one exist per card. In this case the
+ * struct xxx_par for each graphics card would be shared between
+ * every struct fb_info that represents a framebuffer on that card.
+ * This allows when one display changes it video resolution (info->var)
* the other displays know instantly. Each display can always be
* aware of the entire hardware state that affects it because they share
* the same xxx_par struct. The other side of the coin is multiple
* graphics cards that pass data around until it is finally displayed
* on one monitor. Such examples are the voodoo 1 cards and high end
* NUMA graphics servers. For this case we have a bunch of pars, each
- * one that represents a graphics state, that belong to one struct
+ * one that represents a graphics state, that belong to one struct
* fb_info. Their you would want to have *par point to a array of device
- * states and have each struct fb_ops function deal with all those
+ * states and have each struct fb_ops function deal with all those
* states. I hope this covers every possible hardware design. If not
- * feel free to send your ideas at jsimmons@users.sf.net
+ * feel free to send your ideas at jsimmons@users.sf.net
*/
/*
- * If your driver supports multiple boards or it supports multiple
- * framebuffers, you should make these arrays, or allocate them
+ * If your driver supports multiple boards or it supports multiple
+ * framebuffers, you should make these arrays, or allocate them
* dynamically using framebuffer_alloc() and free them with
* framebuffer_release().
- */
+ */
static struct fb_info info;
- /*
+ /*
* Each one represents the state of the hardware. Most hardware have
- * just one hardware state. These here represent the default state(s).
+ * just one hardware state. These here represent the default state(s).
*/
static struct xxx_par __initdata current_par;
* first accessed.
* @info: frame buffer structure that represents a single frame buffer
* @user: tell us if the userland (value=1) or the console is accessing
- * the framebuffer.
+ * the framebuffer.
*
* This function is the first function called in the framebuffer api.
- * Usually you don't need to provide this function. The case where it
+ * Usually you don't need to provide this function. The case where it
* is used is to change from a text mode hardware state to a graphics
- * mode state.
+ * mode state.
*
* Returns negative errno on error, or zero on success.
*/
}
/**
- * xxxfb_release - Optional function. Called when the framebuffer
- * device is closed.
+ * xxxfb_release - Optional function. Called when the framebuffer
+ * device is closed.
* @info: frame buffer structure that represents a single frame buffer
* @user: tell us if the userland (value=1) or the console is accessing
- * the framebuffer.
- *
- * Thus function is called when we close /dev/fb or the framebuffer
+ * the framebuffer.
+ *
+ * Thus function is called when we close /dev/fb or the framebuffer
* console system is released. Usually you don't need this function.
* The case where it is usually used is to go from a graphics state
* to a text mode state.
}
/**
- * xxxfb_check_var - Optional function. Validates a var passed in.
+ * xxxfb_check_var - Optional function. Validates a var passed in.
* @var: frame buffer variable screen structure
- * @info: frame buffer structure that represents a single frame buffer
+ * @info: frame buffer structure that represents a single frame buffer
*
* Checks to see if the hardware supports the state requested by
- * var passed in. This function does not alter the hardware state!!!
- * This means the data stored in struct fb_info and struct xxx_par do
- * not change. This includes the var inside of struct fb_info.
+ * var passed in. This function does not alter the hardware state!!!
+ * This means the data stored in struct fb_info and struct xxx_par do
+ * not change. This includes the var inside of struct fb_info.
* Do NOT change these. This function can be called on its own if we
- * intent to only test a mode and not actually set it. The stuff in
- * modedb.c is a example of this. If the var passed in is slightly
+ * intent to only test a mode and not actually set it. The stuff in
+ * modedb.c is a example of this. If the var passed in is slightly
* off by what the hardware can support then we alter the var PASSED in
* to what we can do.
*
static int xxxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
{
/* ... */
- return 0;
+ return 0;
}
/**
*
* Using the fb_var_screeninfo in fb_info we set the resolution of the
* this particular framebuffer. This function alters the par AND the
- * fb_fix_screeninfo stored in fb_info. It doesn't not alter var in
+ * fb_fix_screeninfo stored in fb_info. It doesn't not alter var in
* fb_info since we are using that data. This means we depend on the
- * data in var inside fb_info to be supported by the hardware.
+ * data in var inside fb_info to be supported by the hardware.
*
* This function is also used to recover/restore the hardware to a
* known working state.
{
struct xxx_par *par = info->par;
/* ... */
- return 0;
+ return 0;
}
/**
* xxxfb_setcolreg - Optional function. Sets a color register.
- * @regno: Which register in the CLUT we are programming
- * @red: The red value which can be up to 16 bits wide
- * @green: The green value which can be up to 16 bits wide
+ * @regno: Which register in the CLUT we are programming
+ * @red: The red value which can be up to 16 bits wide
+ * @green: The green value which can be up to 16 bits wide
* @blue: The blue value which can be up to 16 bits wide.
* @transp: If supported, the alpha value which can be up to 16 bits wide.
* @info: frame buffer info structure
- *
+ *
* Set a single color register. The values supplied have a 16 bit
- * magnitude which needs to be scaled in this function for the hardware.
+ * magnitude which needs to be scaled in this function for the hardware.
* Things to take into consideration are how many color registers, if
* any, are supported with the current color visual. With truecolor mode
* no color palettes are supported. Here a pseudo palette is created
* pseudocolor mode we have a limited color palette. To deal with this
* we can program what color is displayed for a particular pixel value.
* DirectColor is similar in that we can program each color field. If
- * we have a static colormap we don't need to implement this function.
- *
+ * we have a static colormap we don't need to implement this function.
+ *
* Returns negative errno on error, or zero on success.
*/
static int xxxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
/**
* xxxfb_blank - NOT a required function. Blanks the display.
- * @blank_mode: the blank mode we want.
+ * @blank_mode: the blank mode we want.
* @info: frame buffer structure that represents a single frame buffer
*
* Blank the screen if blank_mode != FB_BLANK_UNBLANK, else unblank.
/*
* We provide our own functions if we have hardware acceleration
- * or non packed pixel format layouts. If we have no hardware
+ * or non packed pixel format layouts. If we have no hardware
* acceleration, we can use a generic unaccelerated function. If using
- * a pack pixel format just use the functions in cfb_*.c. Each file
+ * a pack pixel format just use the functions in cfb_*.c. Each file
* has one of the three different accel functions we support.
*/
/**
- * xxxfb_fillrect - REQUIRED function. Can use generic routines if
+ * xxxfb_fillrect - REQUIRED function. Can use generic routines if
* non acclerated hardware and packed pixel based.
- * Draws a rectangle on the screen.
+ * Draws a rectangle on the screen.
*
* @info: frame buffer structure that represents a single frame buffer
- * @region: The structure representing the rectangular region we
+ * @region: The structure representing the rectangular region we
* wish to draw to.
*
- * This drawing operation places/removes a retangle on the screen
+ * This drawing operation places/removes a retangle on the screen
* depending on the rastering operation with the value of color which
* is in the current color depth format.
*/
{
/* Meaning of struct fb_fillrect
*
- * @dx: The x and y corrdinates of the upper left hand corner of the
- * @dy: area we want to draw to.
+ * @dx: The x and y corrdinates of the upper left hand corner of the
+ * @dy: area we want to draw to.
* @width: How wide the rectangle is we want to draw.
* @height: How tall the rectangle is we want to draw.
- * @color: The color to fill in the rectangle with.
+ * @color: The color to fill in the rectangle with.
* @rop: The raster operation. We can draw the rectangle with a COPY
- * of XOR which provides erasing effect.
+ * of XOR which provides erasing effect.
*/
}
* This drawing operation copies a rectangular area from one area of the
* screen to another area.
*/
-void xxxfb_copyarea(struct fb_info *p, const struct fb_copyarea *area)
+void xxxfb_copyarea(struct fb_info *p, const struct fb_copyarea *area)
{
/*
* @dx: The x and y coordinates of the upper left hand corner of the
/**
* xxxfb_imageblit - REQUIRED function. Can use generic routines if
* non acclerated hardware and packed pixel based.
- * Copies a image from system memory to the screen.
+ * Copies a image from system memory to the screen.
*
* @info: frame buffer structure that represents a single frame buffer
* @image: structure defining the image.
*
- * This drawing operation draws a image on the screen. It can be a
+ * This drawing operation draws a image on the screen. It can be a
* mono image (needed for font handling) or a color image (needed for
- * tux).
+ * tux).
*/
-void xxxfb_imageblit(struct fb_info *p, const struct fb_image *image)
+void xxxfb_imageblit(struct fb_info *p, const struct fb_image *image)
{
/*
* @dx: The x and y coordinates of the upper left hand corner of the
* @dy: destination area to place the image on the screen.
* @width: How wide the image is we want to copy.
* @height: How tall the image is we want to copy.
- * @fg_color: For mono bitmap images this is color data for
+ * @fg_color: For mono bitmap images this is color data for
* @bg_color: the foreground and background of the image to
* write directly to the frmaebuffer.
* @depth: How many bits represent a single pixel for this image.
* @data: The actual data used to construct the image on the display.
- * @cmap: The colormap used for color images.
+ * @cmap: The colormap used for color images.
*/
/*
int xxxfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
{
/*
- * @set: Which fields we are altering in struct fb_cursor
- * @enable: Disable or enable the cursor
- * @rop: The bit operation we want to do.
- * @mask: This is the cursor mask bitmap.
+ * @set: Which fields we are altering in struct fb_cursor
+ * @enable: Disable or enable the cursor
+ * @rop: The bit operation we want to do.
+ * @mask: This is the cursor mask bitmap.
* @dest: A image of the area we are going to display the cursor.
- * Used internally by the driver.
- * @hot: The hot spot.
+ * Used internally by the driver.
+ * @hot: The hot spot.
* @image: The actual data for the cursor image.
*
* NOTES ON FLAGS (cursor->set):
}
/**
- * xxxfb_sync - NOT a required function. Normally the accel engine
+ * xxxfb_sync - NOT a required function. Normally the accel engine
* for a graphics card take a specific amount of time.
* Often we have to wait for the accelerator to finish
* its operation before we can write to the framebuffer
- * so we can have consistent display output.
+ * so we can have consistent display output.
*
* @info: frame buffer structure that represents a single frame buffer
*
struct fb_info *info;
struct xxx_par *par;
struct device *device = &dev->dev; /* or &pdev->dev */
- int cmap_len, retval;
-
+ int cmap_len, retval;
+
/*
* Dynamically allocate info and par
*/
par = info->par;
- /*
+ /*
* Here we set the screen_base to the virtual memory address
* for the framebuffer. Usually we obtain the resource address
* from the bus layer and then translate it to virtual memory
- * space via ioremap. Consult ioport.h.
+ * space via ioremap. Consult ioport.h.
*/
info->screen_base = framebuffer_virtual_memory;
info->fbops = &xxxfb_ops;
/*
* This should give a reasonable default video mode. The following is
- * done when we can set a video mode.
+ * done when we can set a video mode.
*/
if (!mode_option)
- mode_option = "640x480@60";
+ mode_option = "640x480@60";
retval = fb_find_mode(&info->var, info, mode_option, NULL, 0, NULL, 8);
-
+
if (!retval || retval == 4)
- return -EINVAL;
+ return -EINVAL;
/* This has to be done! */
if (fb_alloc_cmap(&info->cmap, cmap_len, 0))
return -ENOMEM;
-
- /*
- * The following is done in the case of having hardware with a static
- * mode. If we are setting the mode ourselves we don't call this.
- */
+
+ /*
+ * The following is done in the case of having hardware with a static
+ * mode. If we are setting the mode ourselves we don't call this.
+ */
info->var = xxxfb_var;
/*
return -EINVAL;
}
var->pixclock = KHZ2PICOS(freq);
-
+
if (var->vmode & FB_VMODE_INTERLACED)
vBackPorch += (vBackPorch % 2);
if (var->vmode & FB_VMODE_DOUBLE) {
printk(KERN_ERR "sstfb: Unsupported bpp %d\n", var->bits_per_pixel);
return -EINVAL;
}
-
+
/* validity tests */
if (var->xres <= 1 || yDim <= 0 || var->hsync_len <= 1 ||
hSyncOff <= 1 || var->left_margin <= 2 || vSyncOn <= 0 ||
if (IS_VOODOO2(par)) {
/* Voodoo 2 limits */
- tiles_in_X = (var->xres + 63 ) / 64 * 2;
+ tiles_in_X = (var->xres + 63 ) / 64 * 2;
if (var->xres > POW2(11) || yDim >= POW2(11)) {
printk(KERN_ERR "sstfb: Unsupported resolution %dx%d\n",
lfbmode |= ( LFB_WORD_SWIZZLE_WR | LFB_BYTE_SWIZZLE_WR |
LFB_WORD_SWIZZLE_RD | LFB_BYTE_SWIZZLE_RD );
#endif
-
+
if (clipping) {
sst_write(LFBMODE, lfbmode | EN_PXL_PIPELINE);
/*
| (green << info->var.green.offset)
| (blue << info->var.blue.offset)
| (transp << info->var.transp.offset);
-
+
par->palette[regno] = col;
return 0;
{
struct sstfb_par *par = info->par;
u32 stride = info->fix.line_length;
-
+
if (!IS_VOODOO2(par))
return;
* FillRect 2D command (solidfill or invert (via ROP_XOR)) - Voodoo2 only
*/
#if 0
-static void sstfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
+static void sstfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
{
struct sstfb_par *par = info->par;
u32 stride = info->fix.line_length;
if (!IS_VOODOO2(par))
return;
-
+
sst_write(BLTCLIPX, info->var.xres);
sst_write(BLTCLIPY, info->var.yres);
-
+
sst_write(BLTDSTBASEADDR, 0);
sst_write(BLTCOLOR, rect->color);
sst_write(BLTROP, rect->rop == ROP_COPY ? BLTROP_COPY : BLTROP_XOR);
-/*
- * get lfb size
+/*
+ * get lfb size
*/
static int sst_get_memsize(struct fb_info *info, __u32 *memsize)
{
}
-/*
- * DAC detection routines
+/*
+ * DAC detection routines
*/
/* fbi should be idle, and fifo emty and mem disabled */
* see detect_dac
*/
-static int sst_set_pll_att_ti(struct fb_info *info,
+static int sst_set_pll_att_ti(struct fb_info *info,
const struct pll_timing *t, const int clock)
{
struct sstfb_par *par = info->par;
return -ENOMEM;
pci_set_drvdata(pdev, info);
-
+
par = info->par;
fix = &info->fix;
-
+
par->type = id->driver_data;
spec = &voodoo_spec[par->type];
f_ddprintk("found device : %s\n", spec->name);
* fact dithered to 16bit).
*/
fix->line_length = 2048; /* default value, for 24 or 32bit: 4096 */
-
+
fb_find_mode(&info->var, info, mode_option, NULL, 0, NULL, 16);
if (sstfb_check_var(&info->var, info)) {
printk(KERN_ERR "sstfb: can't set default video mode.\n");
goto fail;
}
-
+
if (fb_alloc_cmap(&info->cmap, 256, 0)) {
printk(KERN_ERR "sstfb: can't alloc cmap memory.\n");
goto fail;
info = pci_get_drvdata(pdev);
par = info->par;
-
+
device_remove_file(info->dev, &device_attrs[0]);
sst_shutdown(info);
iounmap(info->screen_base);
/* Handle another common case in which accel_putcs
generates a large bitmap, which happens to be aligned.
- Allow the tail to be misaligned. This case is
+ Allow the tail to be misaligned. This case is
interesting because we've not got to hold partial
bytes across the words being written. */
}
/**
- * tgafb_fillrect - REQUIRED function. Can use generic routines if
+ * tgafb_fillrect - REQUIRED function. Can use generic routines if
* non acclerated hardware and packed pixel based.
- * Draws a rectangle on the screen.
+ * Draws a rectangle on the screen.
*
* @info: frame buffer structure that represents a single frame buffer
* @rect: structure defining the rectagle and operation.
/* Handle the special case of copying entire lines, e.g. during scrolling.
We can avoid a lot of needless computation in this case. In the 8bpp
- case we need to use the COPY64 registers instead of mask writes into
+ case we need to use the COPY64 registers instead of mask writes into
the frame buffer to achieve maximum performance. */
static inline void
}
static void
-tgafb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
+tgafb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
{
unsigned long dx, dy, width, height, sx, sy, vxres, vyres;
unsigned long line_length, bpp;
/*
* linux/drivers/video/vga16.c -- VGA 16-color framebuffer driver
- *
+ *
* Copyright 1999 Ben Pfaff <pfaffben@debian.org> and Petr Vandrovec <VANDROVE@vc.cvut.cz>
* Based on VGA info at http://www.goodnet.com/~tinara/FreeVGA/home.htm
* Based on VESA framebuffer (c) 1998 Gerd Knorr <kraxel@goldbach.in-berlin.de>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
- * archive for more details.
+ * archive for more details.
*/
#include <linux/module.h>
.yres = 480,
.xres_virtual = 640,
.yres_virtual = 480,
- .bits_per_pixel = 4,
+ .bits_per_pixel = 4,
.activate = FB_ACTIVATE_TEST,
.height = -1,
.width = -1,
static inline int setmode(int mode)
{
int oldmode;
-
+
oldmode = vga_io_rgfx(VGA_GFX_MODE);
vga_io_w(VGA_GFX_D, mode);
return oldmode;
vga_io_w(VGA_GFX_D, mask);
}
-/* Set the Data Rotate Register and return its old value.
+/* Set the Data Rotate Register and return its old value.
Bits 0-2 are rotate count, bits 3-4 are logical operation
(0=NOP, 1=AND, 2=OR, 3=XOR). */
static inline int setop(int op)
{
int oldop;
-
+
oldop = vga_io_rgfx(VGA_GFX_DATA_ROTATE);
vga_io_w(VGA_GFX_D, op);
return oldop;
}
-/* Set the Enable Set/Reset Register and return its old value.
+/* Set the Enable Set/Reset Register and return its old value.
The code here always uses value 0xf for this register. */
static inline int setsr(int sr)
{
return 0;
}
-static void vga16fb_pan_var(struct fb_info *info,
+static void vga16fb_pan_var(struct fb_info *info,
struct fb_var_screeninfo *var)
{
struct vga16fb_par *par = info->par;
par->clkdiv = best->seq_clock_mode;
*pixclock = (best->pixclock * div) / mul;
}
-
+
#define FAIL(X) return -EINVAL
static int vga16fb_open(struct fb_info *info, int user)
par->misc &= ~0x40;
if (var->sync & FB_SYNC_VERT_HIGH_ACT)
par->misc &= ~0x80;
-
+
par->mode = mode;
if (mode & MODE_8BPP)
else
/* pixel clock == vga clock */
vga16fb_clock_chip(par, &var->pixclock, info, 1, 1);
-
- var->red.offset = var->green.offset = var->blue.offset =
+
+ var->red.offset = var->green.offset = var->blue.offset =
var->transp.offset = 0;
var->red.length = var->green.length = var->blue.length =
(par->isVGA) ? 6 : 2;
else
atc[VGA_ATC_PEL] = info->var.xoffset & 7;
atc[VGA_ATC_COLOR_PAGE] = 0x00;
-
+
if (par->mode & MODE_TEXT) {
- fh = 16; // FIXME !!! Fudge font height.
- par->crtc[VGA_CRTC_MAX_SCAN] = (par->crtc[VGA_CRTC_MAX_SCAN]
+ fh = 16; // FIXME !!! Fudge font height.
+ par->crtc[VGA_CRTC_MAX_SCAN] = (par->crtc[VGA_CRTC_MAX_SCAN]
& ~0x1F) | (fh - 1);
}
vga_io_w(EGA_GFX_E0, 0x00);
vga_io_w(EGA_GFX_E1, 0x01);
}
-
+
/* update misc output register */
vga_io_w(VGA_MIS_W, par->misc);
-
+
/* synchronous reset on */
vga_io_wseq(0x00, 0x01);
for (i = 2; i < VGA_SEQ_C; i++) {
vga_io_wseq(i, seq[i]);
}
-
+
/* synchronous reset off */
vga_io_wseq(0x00, 0x03);
for (i = 0; i < VGA_CRTC_REGS; i++) {
vga_io_wcrt(i, par->crtc[i]);
}
-
+
/* write graphics controller registers */
for (i = 0; i < VGA_GFX_C; i++) {
vga_io_wgfx(i, gdc[i]);
}
-
+
/* write attribute controller registers */
for (i = 0; i < VGA_ATT_C; i++) {
vga_io_r(VGA_IS1_RC); /* reset flip-flop */
{
static const unsigned char map[] = { 000, 001, 010, 011 };
int val;
-
+
if (regno >= 16)
return;
val = map[red>>14] | ((map[green>>14]) << 1) | ((map[blue>>14]) << 2);
* (according to the entries in the `var' structure). Return
* != 0 for invalid regno.
*/
-
+
if (regno >= 256)
return 1;
gray = info->var.grayscale;
-
+
if (gray) {
/* gray = 0.30*R + 0.59*G + 0.11*B */
red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
}
- if (par->isVGA)
+ if (par->isVGA)
vga16_setpalette(regno,red,green,blue);
else
ega16_setpalette(regno,red,green,blue);
}
static int vga16fb_pan_display(struct fb_var_screeninfo *var,
- struct fb_info *info)
+ struct fb_info *info)
{
vga16fb_pan_var(info, var);
return 0;
{
unsigned char SeqCtrlIndex = vga_io_r(VGA_SEQ_I);
unsigned char CrtCtrlIndex = vga_io_r(VGA_CRT_IC);
-
+
/* save original values of VGA controller registers */
if(!par->vesa_blanked) {
par->vga_state.CrtMiscIO = vga_io_r(VGA_MIS_R);
{
unsigned char SeqCtrlIndex = vga_io_r(VGA_SEQ_I);
unsigned char CrtCtrlIndex = vga_io_r(VGA_CRT_IC);
-
+
/* restore original values of VGA controller registers */
vga_io_w(VGA_MIS_W, par->vga_state.CrtMiscIO);
}
break;
}
- } else
+ } else
vga_8planes_fillrect(info, rect);
break;
case FB_TYPE_PACKED_PIXELS:
static void vga16fb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
{
- u32 dx = area->dx, dy = area->dy, sx = area->sx, sy = area->sy;
+ u32 dx = area->dx, dy = area->dy, sx = area->sx, sy = area->sy;
int x, x2, y2, old_dx, old_dy, vxres, vyres;
int height, width, line_ofs;
char __iomem *dst = NULL;
dst += line_ofs;
}
} else {
- dst = info->screen_base + (dx/8) + width +
+ dst = info->screen_base + (dx/8) + width +
(dy + height - 1) * info->fix.line_length;
- src = info->screen_base + (sx/8) + width +
+ src = info->screen_base + (sx/8) + width +
(sy + height - 1) * info->fix.line_length;
while (height--) {
for (x = 0; x < width; x++) {
dst -= line_ofs;
}
}
- } else
+ } else
vga_8planes_copyarea(info, area);
break;
case FB_TYPE_PACKED_PIXELS:
setsr(0xf);
setcolor(image->fg_color);
selectmask();
-
+
setmask(0xff);
writeb(image->bg_color, where);
rmb();
wmb();
for (y = 0; y < image->height; y++) {
dst = where;
- for (x = image->width/8; x--;)
+ for (x = image->width/8; x--;)
writeb(*cdat++, dst++);
where += info->fix.line_length;
}
setsr(0xf);
setcolor(image->bg_color);
selectmask();
-
+
setmask(0xff);
for (y = 0; y < image->height; y++) {
dst = where;
where += info->fix.line_length;
}
}
- } else
+ } else
vga_8planes_imageblit(info, image);
break;
case FB_TYPE_PACKED_PIXELS:
static void vga_imageblit_color(struct fb_info *info, const struct fb_image *image)
{
/*
- * Draw logo
+ * Draw logo
*/
struct vga16fb_par *par = info->par;
char __iomem *where =
setsr(0xf);
setop(0);
setmode(0);
-
+
for (y = 0; y < image->height; y++) {
for (x = 0; x < image->width; x++) {
dst = where + x/8;
break;
}
}
-
+
static void vga16fb_imageblit(struct fb_info *info, const struct fb_image *image)
{
if (image->depth == 1)
static int __init vga16fb_setup(char *options)
{
char *this_opt;
-
+
if (!options || !*options)
return 0;
-
+
while ((this_opt = strsep(&options, ",")) != NULL) {
if (!*this_opt) continue;
}
par->vesa_blanked = 0;
i = par->isVGA? 6 : 2;
-
+
vga16fb_defined.red.length = i;
vga16fb_defined.green.length = i;
- vga16fb_defined.blue.length = i;
+ vga16fb_defined.blue.length = i;
/* name should not depend on EGA/VGA */
info->fbops = &vga16fb_ops;
* linux/include/video/vga.h -- standard VGA chipset interaction
*
* Copyright 1999 Jeff Garzik <jgarzik@pobox.com>
- *
+ *
* Copyright history from vga16fb.c:
* Copyright 1999 Ben Pfaff and Petr Vandrovec
- * Based on VGA info at http://www.osdever.net/FreeVGA/home.htm
+ * Based on VGA info at http://www.osdever.net/FreeVGA/home.htm
* Based on VESA framebuffer (c) 1998 Gerd Knorr
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
- * archive for more details.
+ * archive for more details.
*
*/
__u32 num_gfx; /* number of gfx registers, 0 for default */
__u32 num_seq; /* number of seq registers, 0 for default */
void *vidstate;
-};
+};
extern int save_vga(struct vgastate *state);
extern int restore_vga(struct vgastate *state);
/*
* generic VGA port read/write
*/
-
+
static inline unsigned char vga_io_r (unsigned short port)
{
return inb_p(port);
/*
* VGA CRTC register read/write
*/
-
+
static inline unsigned char vga_rcrt (void __iomem *regbase, unsigned char reg)
{
vga_w (regbase, VGA_CRT_IC, reg);
/*
* VGA sequencer register read/write
*/
-
+
static inline unsigned char vga_rseq (void __iomem *regbase, unsigned char reg)
{
vga_w (regbase, VGA_SEQ_I, reg);
/*
* VGA graphics controller register read/write
*/
-
+
static inline unsigned char vga_rgfx (void __iomem *regbase, unsigned char reg)
{
vga_w (regbase, VGA_GFX_I, reg);
/*
* VGA attribute controller register read/write
*/
-
+
static inline unsigned char vga_rattr (void __iomem *regbase, unsigned char reg)
{
vga_w (regbase, VGA_ATT_IW, reg);
projects / kernel.git / commitdiff