static inline void debug_stack_usage_dec(void) { }
#endif /* X86_64 */
+static __always_inline unsigned long local_db_save(void)
+{
+ unsigned long dr7;
+
+ get_debugreg(dr7, 7);
+ dr7 &= ~0x400; /* architecturally set bit */
+ if (dr7)
+ set_debugreg(0, 7);
+ /*
+ * Ensure the compiler doesn't lower the above statements into
+ * the critical section; disabling breakpoints late would not
+ * be good.
+ */
+ barrier();
+
+ return dr7;
+}
+
+static __always_inline void local_db_restore(unsigned long dr7)
+{
+ /*
+ * Ensure the compiler doesn't raise this statement into
+ * the critical section; enabling breakpoints early would
+ * not be good.
+ */
+ barrier();
+ if (dr7)
+ set_debugreg(dr7, 7);
+}
+
#ifdef CONFIG_CPU_SUP_AMD
extern void set_dr_addr_mask(unsigned long mask, int dr);
#else
* Entry text is excluded for HW_BP_X and cpu_entry_area, which
* includes the entry stack is excluded for everything.
*/
- get_debugreg(*dr7, 7);
- set_debugreg(0, 7);
-
- /*
- * Ensure the compiler doesn't lower the above statements into
- * the critical section; disabling breakpoints late would not
- * be good.
- */
- barrier();
+ *dr7 = local_db_save();
/*
* The Intel SDM says:
static __always_inline void debug_exit(unsigned long dr7)
{
- /*
- * Ensure the compiler doesn't raise this statement into
- * the critical section; enabling breakpoints early would
- * not be good.
- */
- barrier();
- set_debugreg(dr7, 7);
+ local_db_restore(dr7);
}
/*