interconnect: icc-rpm: Add QNOC type QoS support

It adds QoS support for QNOC type device which can be found on QCM2290
platform.  The downstream driver[1] includes support for priority,
limiter, regulator and forwarding setup.  As QCM2290 support only
requires priority and forwarding configuration, limiter and regulator
support are omitted for this initial submission.

[1] https://source.codeaurora.org/quic/la/kernel/msm-4.19/tree/drivers/soc/qcom/msm_bus/msm_bus_qnoc_adhoc.c?h=kernel.lnx.4.19.r22-rel

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20211215002324.1727-3-shawn.guo@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>

diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c
index 429c377231e67b1ee255d2e62954bae81e86c8ba..d8ea9bb479b121c1efe490892e6f32c7c4ff271e 100644 (file)
--- a/drivers/interconnect/qcom/icc-rpm.c
+++ b/drivers/interconnect/qcom/icc-rpm.c
@@ -18,6 +18,13 @@
 #include "smd-rpm.h"
 #include "icc-rpm.h"
 
+/* QNOC QoS */
+#define QNOC_QOS_MCTL_LOWn_ADDR(n)     (0x8 + (n * 0x1000))
+#define QNOC_QOS_MCTL_DFLT_PRIO_MASK   0x70
+#define QNOC_QOS_MCTL_DFLT_PRIO_SHIFT  4
+#define QNOC_QOS_MCTL_URGFWD_EN_MASK   0x8
+#define QNOC_QOS_MCTL_URGFWD_EN_SHIFT  3
+
 /* BIMC QoS */
 #define M_BKE_REG_BASE(n)              (0x300 + (0x4000 * n))
 #define M_BKE_EN_ADDR(n)               (M_BKE_REG_BASE(n))
@@ -40,6 +47,27 @@
 #define NOC_QOS_MODEn_ADDR(n)          (0xc + (n * 0x1000))
 #define NOC_QOS_MODEn_MASK             0x3
 
+static int qcom_icc_set_qnoc_qos(struct icc_node *src, u64 max_bw)
+{
+       struct icc_provider *provider = src->provider;
+       struct qcom_icc_provider *qp = to_qcom_provider(provider);
+       struct qcom_icc_node *qn = src->data;
+       struct qcom_icc_qos *qos = &qn->qos;
+       int rc;
+
+       rc = regmap_update_bits(qp->regmap,
+                       qp->qos_offset + QNOC_QOS_MCTL_LOWn_ADDR(qos->qos_port),
+                       QNOC_QOS_MCTL_DFLT_PRIO_MASK,
+                       qos->areq_prio << QNOC_QOS_MCTL_DFLT_PRIO_SHIFT);
+       if (rc)
+               return rc;
+
+       return regmap_update_bits(qp->regmap,
+                       qp->qos_offset + QNOC_QOS_MCTL_LOWn_ADDR(qos->qos_port),
+                       QNOC_QOS_MCTL_URGFWD_EN_MASK,
+                       !!qos->urg_fwd_en << QNOC_QOS_MCTL_URGFWD_EN_SHIFT);
+}
+
 static int qcom_icc_bimc_set_qos_health(struct qcom_icc_provider *qp,
                                        struct qcom_icc_qos *qos,
                                        int regnum)
@@ -164,10 +192,14 @@ static int qcom_icc_qos_set(struct icc_node *node, u64 sum_bw)
 
        dev_dbg(node->provider->dev, "Setting QoS for %s\n", qn->name);
 
-       if (qp->type == QCOM_ICC_BIMC)
+       switch (qp->type) {
+       case QCOM_ICC_BIMC:
                return qcom_icc_set_bimc_qos(node, sum_bw);
-
-       return qcom_icc_set_noc_qos(node, sum_bw);
+       case QCOM_ICC_QNOC:
+               return qcom_icc_set_qnoc_qos(node, sum_bw);
+       default:
+               return qcom_icc_set_noc_qos(node, sum_bw);
+       }
 }
 
 static int qcom_icc_rpm_set(int mas_rpm_id, int slv_rpm_id, u64 sum_bw)

diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h
index 2268777348cb3b790a1b897df5ede1ecb7e4ceb9..26dad006034fd783760cb861b2b53b42ac6d8452 100644 (file)
--- a/drivers/interconnect/qcom/icc-rpm.h
+++ b/drivers/interconnect/qcom/icc-rpm.h
@@ -15,6 +15,7 @@
 enum qcom_icc_type {
        QCOM_ICC_NOC,
        QCOM_ICC_BIMC,
+       QCOM_ICC_QNOC,
 };
 
 /**
@@ -43,6 +44,7 @@ struct qcom_icc_provider {
  * @ap_owned: indicates if the node is owned by the AP or by the RPM
  * @qos_mode: default qos mode for this node
  * @qos_port: qos port number for finding qos registers of this node
+ * @urg_fwd_en: enable urgent forwarding
  */
 struct qcom_icc_qos {
        u32 areq_prio;
@@ -51,6 +53,7 @@ struct qcom_icc_qos {
        bool ap_owned;
        int qos_mode;
        int qos_port;
+       bool urg_fwd_en;
 };
 
 /**