]> git.baikalelectronics.ru Git - kernel.git/commitdiff
net: hns3: add support for FD counter in debugfs
authorJian Shen <shenjian15@huawei.com>
Sat, 26 Jun 2021 01:00:16 +0000 (09:00 +0800)
committerDavid S. Miller <davem@davemloft.net>
Mon, 28 Jun 2021 20:34:58 +0000 (13:34 -0700)
Previously, the flow director counter is not enabled. To improve the
maintainability for chechking whether flow director hit or not, enable
flow director counter for each function, and add debugfs query inerface
to query the counters for each function.

The debugfs command is below:
cat fd_counter
func_id    hit_times
pf         0
vf0        0
vf1        0

Signed-off-by: Jian Shen <shenjian15@huawei.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/hisilicon/hns3/hnae3.h
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

index 0b202f4def83111c4b4709701a5d01f82c6b61e7..a6ef67e47c8ae8d567b810608cd0c78d735258fe 100644 (file)
@@ -290,6 +290,7 @@ enum hnae3_dbg_cmd {
        HNAE3_DBG_CMD_RX_QUEUE_INFO,
        HNAE3_DBG_CMD_TX_QUEUE_INFO,
        HNAE3_DBG_CMD_FD_TCAM,
+       HNAE3_DBG_CMD_FD_COUNTER,
        HNAE3_DBG_CMD_MAC_TNL_STATUS,
        HNAE3_DBG_CMD_SERV_INFO,
        HNAE3_DBG_CMD_UNKNOWN,
index 34b6cd904a1ad34b8e43a8e1c55ca6aed77f2696..b72fdb94df63f3b05d844f15329cb4cf7969a687 100644 (file)
@@ -323,6 +323,13 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = {
                .buf_len = HNS3_DBG_READ_LEN,
                .init = hns3_dbg_common_file_init,
        },
+       {
+               .name = "fd_counter",
+               .cmd = HNAE3_DBG_CMD_FD_COUNTER,
+               .dentry = HNS3_DBG_DENTRY_FD,
+               .buf_len = HNS3_DBG_READ_LEN,
+               .init = hns3_dbg_common_file_init,
+       },
 };
 
 static struct hns3_dbg_cap_info hns3_dbg_cap[] = {
index a322dfeba5cf9d7d5e4981ad1a968edf0eed13cb..18bde77ef944254c66f62606e194856b4e0b16c0 100644 (file)
@@ -248,6 +248,7 @@ enum hclge_opcode_type {
        HCLGE_OPC_FD_KEY_CONFIG         = 0x1202,
        HCLGE_OPC_FD_TCAM_OP            = 0x1203,
        HCLGE_OPC_FD_AD_OP              = 0x1204,
+       HCLGE_OPC_FD_CNT_OP             = 0x1205,
        HCLGE_OPC_FD_USER_DEF_OP        = 0x1207,
 
        /* MDIO command */
@@ -1109,6 +1110,14 @@ struct hclge_fd_ad_config_cmd {
        u8 rsv2[8];
 };
 
+struct hclge_fd_ad_cnt_read_cmd {
+       u8 rsv0[4];
+       __le16 index;
+       u8 rsv1[2];
+       __le64 cnt;
+       u8 rsv2[8];
+};
+
 #define HCLGE_FD_USER_DEF_OFT_S                0
 #define HCLGE_FD_USER_DEF_OFT_M                GENMASK(14, 0)
 #define HCLGE_FD_USER_DEF_EN_B         15
index 6fc50d09b9db775b4092c90b5171d0b34114f3ac..b69c54d365a7119ffa8a9eed6570d800d4d940fd 100644 (file)
@@ -1549,6 +1549,39 @@ out:
        return ret;
 }
 
+static int hclge_dbg_dump_fd_counter(struct hclge_dev *hdev, char *buf, int len)
+{
+       u8 func_num = pci_num_vf(hdev->pdev) + 1; /* pf and enabled vf num */
+       struct hclge_fd_ad_cnt_read_cmd *req;
+       char str_id[HCLGE_DBG_ID_LEN];
+       struct hclge_desc desc;
+       int pos = 0;
+       int ret;
+       u64 cnt;
+       u8 i;
+
+       pos += scnprintf(buf + pos, len - pos,
+                        "func_id\thit_times\n");
+
+       for (i = 0; i < func_num; i++) {
+               hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_FD_CNT_OP, true);
+               req = (struct hclge_fd_ad_cnt_read_cmd *)desc.data;
+               req->index = cpu_to_le16(i);
+               ret = hclge_cmd_send(&hdev->hw, &desc, 1);
+               if (ret) {
+                       dev_err(&hdev->pdev->dev, "failed to get fd counter, ret = %d\n",
+                               ret);
+                       return ret;
+               }
+               cnt = le64_to_cpu(req->cnt);
+               hclge_dbg_get_func_id_str(str_id, i);
+               pos += scnprintf(buf + pos, len - pos,
+                                "%s\t%llu\n", str_id, cnt);
+       }
+
+       return 0;
+}
+
 int hclge_dbg_dump_rst_info(struct hclge_dev *hdev, char *buf, int len)
 {
        int pos = 0;
@@ -2375,6 +2408,10 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = {
                .cmd = HNAE3_DBG_CMD_VLAN_CONFIG,
                .dbg_dump = hclge_dbg_dump_vlan_config,
        },
+       {
+               .cmd = HNAE3_DBG_CMD_FD_COUNTER,
+               .dbg_dump = hclge_dbg_dump_fd_counter,
+       },
 };
 
 int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd,
index f3e482ab3c716d6e97c64954bb8fcab518878908..dd3354a57c6206f5c4264ac9710a1936fad686fd 100644 (file)
@@ -6000,8 +6000,14 @@ static int hclge_config_action(struct hclge_dev *hdev, u8 stage,
                ad_data.queue_id = rule->queue_id;
        }
 
-       ad_data.use_counter = false;
-       ad_data.counter_id = 0;
+       if (hdev->fd_cfg.cnt_num[HCLGE_FD_STAGE_1]) {
+               ad_data.use_counter = true;
+               ad_data.counter_id = rule->vf_id %
+                                    hdev->fd_cfg.cnt_num[HCLGE_FD_STAGE_1];
+       } else {
+               ad_data.use_counter = false;
+               ad_data.counter_id = 0;
+       }
 
        ad_data.use_next_stage = false;
        ad_data.next_input_key = 0;