octeontx2-pf: cleanup transmit link deriving logic

Unlike OcteonTx2, the channel numbers used by CGX/RPM
and LBK on CN10K silicons aren't fixed in HW. They are
SW programmable, hence we cannot derive transmit link
from static channel numbers anymore. Get the same from
admin function via mailbox.

Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index 8ee95048faeda4ddd85b80378d7ec48b70bd6af1..487b83482df0b0a7b219495e46ec9b2c4f35f244 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -725,6 +725,7 @@ struct nix_lf_alloc_rsp {
        u8      cgx_links;  /* No. of CGX links present in HW */
        u8      lbk_links;  /* No. of LBK links present in HW */
        u8      sdp_links;  /* No. of SDP links present in HW */
+       u8      tx_link;    /* Transmit channel link number */
 };
 
 struct nix_lf_free_req {

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index a07d99a8c4d723af947539a8e06048ad4b63e084..0cac0f3f425d0e46976a0a9fd7876572c7c89391 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -290,9 +290,11 @@ static bool is_valid_txschq(struct rvu *rvu, int blkaddr,
        return true;
 }
 
-static int nix_interface_init(struct rvu *rvu, u16 pcifunc, int type, int nixlf)
+static int nix_interface_init(struct rvu *rvu, u16 pcifunc, int type, int nixlf,
+                             struct nix_lf_alloc_rsp *rsp)
 {
        struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
+       struct rvu_hwinfo *hw = rvu->hw;
        struct mac_ops *mac_ops;
        int pkind, pf, vf, lbkid;
        u8 cgx_id, lmac_id;
@@ -317,6 +319,8 @@ static int nix_interface_init(struct rvu *rvu, u16 pcifunc, int type, int nixlf)
                pfvf->tx_chan_base = pfvf->rx_chan_base;
                pfvf->rx_chan_cnt = 1;
                pfvf->tx_chan_cnt = 1;
+               rsp->tx_link = cgx_id * hw->lmac_per_cgx + lmac_id;
+
                cgx_set_pkind(rvu_cgx_pdata(cgx_id, rvu), lmac_id, pkind);
                rvu_npc_set_pkind(rvu, pkind, pfvf);
 
@@ -350,6 +354,7 @@ static int nix_interface_init(struct rvu *rvu, u16 pcifunc, int type, int nixlf)
                                        rvu_nix_chan_lbk(rvu, lbkid, vf + 1);
                pfvf->rx_chan_cnt = 1;
                pfvf->tx_chan_cnt = 1;
+               rsp->tx_link = hw->cgx_links + lbkid;
                rvu_npc_set_pkind(rvu, NPC_RX_LBK_PKIND, pfvf);
                rvu_npc_install_promisc_entry(rvu, pcifunc, nixlf,
                                              pfvf->rx_chan_base,
@@ -1304,7 +1309,7 @@ int rvu_mbox_handler_nix_lf_alloc(struct rvu *rvu,
        rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_PARSE_CFG(nixlf), cfg);
 
        intf = is_afvf(pcifunc) ? NIX_INTF_TYPE_LBK : NIX_INTF_TYPE_CGX;
-       err = nix_interface_init(rvu, pcifunc, intf, nixlf);
+       err = nix_interface_init(rvu, pcifunc, intf, nixlf, rsp);
        if (err)
                goto free_mem;
 

diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
index f630e5713025168658736a111579066183587d28..e02682770f160614cc39d1d3bbdf453b8cce1d0f 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
@@ -584,25 +584,6 @@ void otx2_get_mac_from_af(struct net_device *netdev)
 }
 EXPORT_SYMBOL(otx2_get_mac_from_af);
 
-static int otx2_get_link(struct otx2_nic *pfvf)
-{
-       int link = 0;
-       u16 map;
-
-       /* cgx lmac link */
-       if (pfvf->hw.tx_chan_base >= CGX_CHAN_BASE) {
-               map = pfvf->hw.tx_chan_base & 0x7FF;
-               link = 4 * ((map >> 8) & 0xF) + ((map >> 4) & 0xF);
-       }
-       /* LBK channel */
-       if (pfvf->hw.tx_chan_base < SDP_CHAN_BASE) {
-               map = pfvf->hw.tx_chan_base & 0x7FF;
-               link = pfvf->hw.cgx_links | ((map >> 8) & 0xF);
-       }
-
-       return link;
-}
-
 int otx2_txschq_config(struct otx2_nic *pfvf, int lvl)
 {
        struct otx2_hw *hw = &pfvf->hw;
@@ -661,8 +642,7 @@ int otx2_txschq_config(struct otx2_nic *pfvf, int lvl)
                req->regval[1] = TXSCH_TL1_DFLT_RR_PRIO << 24 | dwrr_val;
 
                req->num_regs++;
-               req->reg[2] = NIX_AF_TL3_TL2X_LINKX_CFG(schq,
-                                                       otx2_get_link(pfvf));
+               req->reg[2] = NIX_AF_TL3_TL2X_LINKX_CFG(schq, hw->tx_link);
                /* Enable this queue and backpressure */
                req->regval[2] = BIT_ULL(13) | BIT_ULL(12);
 
@@ -1610,6 +1590,7 @@ void mbox_handler_nix_lf_alloc(struct otx2_nic *pfvf,
        pfvf->hw.lso_tsov6_idx = rsp->lso_tsov6_idx;
        pfvf->hw.cgx_links = rsp->cgx_links;
        pfvf->hw.lbk_links = rsp->lbk_links;
+       pfvf->hw.tx_link = rsp->tx_link;
 }
 EXPORT_SYMBOL(mbox_handler_nix_lf_alloc);
 

diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
index 1a97b76a12e13055bf5bb1f7eedda8f60881a7e9..96eddd030f16091c8a6c397b1383fea06b7e1602 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
@@ -218,6 +218,7 @@ struct otx2_hw {
        u64                     cgx_fec_uncorr_blks;
        u8                      cgx_links;  /* No. of CGX links present in HW */
        u8                      lbk_links;  /* No. of LBK links present in HW */
+       u8                      tx_link;    /* Transmit channel link number */
 #define HW_TSO                 0
 #define CN10K_MBOX             1
 #define CN10K_LMTST            2