]> git.baikalelectronics.ru Git - kernel.git/commitdiff
KVM: nVMX: Save BNDCFGS to vmcs12 iff relevant controls are exposed to L1
authorSean Christopherson <seanjc@google.com>
Tue, 14 Jun 2022 21:58:30 +0000 (21:58 +0000)
committerPaolo Bonzini <pbonzini@redhat.com>
Mon, 20 Jun 2022 10:21:20 +0000 (06:21 -0400)
Save BNDCFGS to vmcs12 (from vmcs02) if and only if at least of one of
the load-on-entry or clear-on-exit fields for BNDCFGS is enumerated as an
allowed-1 bit in vmcs12.  Skipping the field avoids an unnecessary VMREAD
when MPX is supported but not exposed to L1.

Per Intel's SDM:

  If the processor supports either the 1-setting of the "load IA32_BNDCFGS"
  VM-entry control or that of the "clear IA32_BNDCFGS" VM-exit control, the
  contents of the IA32_BNDCFGS MSR are saved into the corresponding field.

Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20220614215831.3762138-5-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
arch/x86/kvm/vmx/nested.c

index 38015f4ecc54dbb3695b6e5ec69a6582ed16db59..496981b86f94dd744afee694e19b5e19a178388f 100644 (file)
@@ -4104,7 +4104,8 @@ static void sync_vmcs02_to_vmcs12_rare(struct kvm_vcpu *vcpu,
        vmcs12->guest_idtr_base = vmcs_readl(GUEST_IDTR_BASE);
        vmcs12->guest_pending_dbg_exceptions =
                vmcs_readl(GUEST_PENDING_DBG_EXCEPTIONS);
-       if (kvm_mpx_supported())
+       if ((vmx->nested.msrs.entry_ctls_high & VM_ENTRY_LOAD_BNDCFGS) ||
+           (vmx->nested.msrs.exit_ctls_high & VM_EXIT_CLEAR_BNDCFGS))
                vmcs12->guest_bndcfgs = vmcs_read64(GUEST_BNDCFGS);
 
        vmx->nested.need_sync_vmcs02_to_vmcs12_rare = false;