]> git.baikalelectronics.ru Git - kernel.git/commitdiff
habanalabs: update F/W register map
authorOded Gabbay <oded.gabbay@gmail.com>
Wed, 22 Apr 2020 10:42:28 +0000 (13:42 +0300)
committerOded Gabbay <oded.gabbay@gmail.com>
Tue, 19 May 2020 11:48:41 +0000 (14:48 +0300)
Update the mapping to the latest one used by the Firmware. No impact on the
driver in this update.

Reviewed-by: Tomer Tayar <ttayar@habana.ai>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
drivers/misc/habanalabs/include/goya/goya_reg_map.h

index 844a6ff5929a82a4027ba4e7b83ed845ea680837..0195f62d725462c21f476dc8a5489252eb9e7c1e 100644 (file)
 /*
  * PSOC scratch-pad registers
  */
-#define mmCPU_PQ_BASE_ADDR_LOW                 mmPSOC_GLOBAL_CONF_SCRATCHPAD_0
-#define mmCPU_PQ_BASE_ADDR_HIGH                        mmPSOC_GLOBAL_CONF_SCRATCHPAD_1
-#define mmCPU_EQ_BASE_ADDR_LOW                 mmPSOC_GLOBAL_CONF_SCRATCHPAD_2
-#define mmCPU_EQ_BASE_ADDR_HIGH                        mmPSOC_GLOBAL_CONF_SCRATCHPAD_3
-#define mmCPU_EQ_LENGTH                                mmPSOC_GLOBAL_CONF_SCRATCHPAD_4
-#define mmCPU_PQ_LENGTH                                mmPSOC_GLOBAL_CONF_SCRATCHPAD_5
-#define mmCPU_EQ_CI                            mmPSOC_GLOBAL_CONF_SCRATCHPAD_6
-#define mmCPU_PQ_INIT_STATUS                   mmPSOC_GLOBAL_CONF_SCRATCHPAD_7
-#define mmCPU_CQ_BASE_ADDR_LOW                 mmPSOC_GLOBAL_CONF_SCRATCHPAD_8
-#define mmCPU_CQ_BASE_ADDR_HIGH                        mmPSOC_GLOBAL_CONF_SCRATCHPAD_9
-#define mmCPU_CQ_LENGTH                                mmPSOC_GLOBAL_CONF_SCRATCHPAD_10
-#define mmCPU_CMD_STATUS_TO_HOST               mmPSOC_GLOBAL_CONF_SCRATCHPAD_23
-#define mmCPU_BOOT_ERR0                                mmPSOC_GLOBAL_CONF_SCRATCHPAD_24
-#define mmCPU_BOOT_ERR1                                mmPSOC_GLOBAL_CONF_SCRATCHPAD_25
-#define mmUPD_STS                              mmPSOC_GLOBAL_CONF_SCRATCHPAD_26
-#define mmUPD_CMD                              mmPSOC_GLOBAL_CONF_SCRATCHPAD_27
-#define mmPREBOOT_VER_OFFSET                   mmPSOC_GLOBAL_CONF_SCRATCHPAD_28
-#define mmUBOOT_VER_OFFSET                     mmPSOC_GLOBAL_CONF_SCRATCHPAD_29
-#define mmRDWR_TEST                            mmPSOC_GLOBAL_CONF_SCRATCHPAD_30
-#define mmBTL_ID                               mmPSOC_GLOBAL_CONF_SCRATCHPAD_31
+#define mmCPU_PQ_BASE_ADDR_LOW         mmPSOC_GLOBAL_CONF_SCRATCHPAD_0
+#define mmCPU_PQ_BASE_ADDR_HIGH                mmPSOC_GLOBAL_CONF_SCRATCHPAD_1
+#define mmCPU_EQ_BASE_ADDR_LOW         mmPSOC_GLOBAL_CONF_SCRATCHPAD_2
+#define mmCPU_EQ_BASE_ADDR_HIGH                mmPSOC_GLOBAL_CONF_SCRATCHPAD_3
+#define mmCPU_EQ_LENGTH                        mmPSOC_GLOBAL_CONF_SCRATCHPAD_4
+#define mmCPU_PQ_LENGTH                        mmPSOC_GLOBAL_CONF_SCRATCHPAD_5
+#define mmCPU_EQ_CI                    mmPSOC_GLOBAL_CONF_SCRATCHPAD_6
+#define mmCPU_PQ_INIT_STATUS           mmPSOC_GLOBAL_CONF_SCRATCHPAD_7
+#define mmCPU_CQ_BASE_ADDR_LOW         mmPSOC_GLOBAL_CONF_SCRATCHPAD_8
+#define mmCPU_CQ_BASE_ADDR_HIGH                mmPSOC_GLOBAL_CONF_SCRATCHPAD_9
+#define mmCPU_CQ_LENGTH                        mmPSOC_GLOBAL_CONF_SCRATCHPAD_10
+#define mmCPU_CMD_STATUS_TO_HOST       mmPSOC_GLOBAL_CONF_SCRATCHPAD_23
+#define mmCPU_BOOT_ERR0                        mmPSOC_GLOBAL_CONF_SCRATCHPAD_24
+#define mmCPU_BOOT_ERR1                        mmPSOC_GLOBAL_CONF_SCRATCHPAD_25
+#define mmUPD_STS                      mmPSOC_GLOBAL_CONF_SCRATCHPAD_26
+#define mmUPD_CMD                      mmPSOC_GLOBAL_CONF_SCRATCHPAD_27
+#define mmPREBOOT_VER_OFFSET           mmPSOC_GLOBAL_CONF_SCRATCHPAD_28
+#define mmUBOOT_VER_OFFSET             mmPSOC_GLOBAL_CONF_SCRATCHPAD_29
+#define mmRDWR_TEST                    mmPSOC_GLOBAL_CONF_SCRATCHPAD_30
+#define mmBTL_ID                       mmPSOC_GLOBAL_CONF_SCRATCHPAD_31
 
-#define mmHW_STATE                             mmPSOC_GLOBAL_CONF_APP_STATUS
+#define mmHW_STATE                     mmPSOC_GLOBAL_CONF_APP_STATUS
 #define mmPSOC_GLOBAL_CONF_CPU_BOOT_STATUS     mmPSOC_GLOBAL_CONF_WARM_REBOOT
+#define mmPSOC_GLOBAL_CONF_KMD_MSG_TO_CPU      mmPSOC_GLOBAL_CONF_UBOOT_MAGIC
+#define mmUPD_PENDING_STS              mmPSOC_GLOBAL_CONF_NON_RST_FLOPS_3
 
 #endif /* GOYA_REG_MAP_H_ */