net: dsa: mt7530: move mt7623 settings out off the mt7530

Moving mt7623 logic out off mt7530, is required to make hardware setting
consistent after we introduce phylink to mtk driver.

Fixes: 6ae43c9d6729 ("net: dsa: mt7530: Convert to PHYLINK API")
Reviewed-by: Sean Wang <sean.wang@mediatek.com>
Tested-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: René van Dorst <opensource@vdorst.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index 2d0d91db0ddb40e1c9d5c271268f343181b4790c..84391c8a0e16c5e6e19fcc07cb26180b28cf516e 100644 (file)
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -66,58 +66,6 @@ static const struct mt7530_mib_desc mt7530_mib[] = {
        MIB_DESC(1, 0xb8, "RxArlDrop"),
 };
 
-static int
-mt7623_trgmii_write(struct mt7530_priv *priv,  u32 reg, u32 val)
-{
-       int ret;
-
-       ret =  regmap_write(priv->ethernet, TRGMII_BASE(reg), val);
-       if (ret < 0)
-               dev_err(priv->dev,
-                       "failed to priv write register\n");
-       return ret;
-}
-
-static u32
-mt7623_trgmii_read(struct mt7530_priv *priv, u32 reg)
-{
-       int ret;
-       u32 val;
-
-       ret = regmap_read(priv->ethernet, TRGMII_BASE(reg), &val);
-       if (ret < 0) {
-               dev_err(priv->dev,
-                       "failed to priv read register\n");
-               return ret;
-       }
-
-       return val;
-}
-
-static void
-mt7623_trgmii_rmw(struct mt7530_priv *priv, u32 reg,
-                 u32 mask, u32 set)
-{
-       u32 val;
-
-       val = mt7623_trgmii_read(priv, reg);
-       val &= ~mask;
-       val |= set;
-       mt7623_trgmii_write(priv, reg, val);
-}
-
-static void
-mt7623_trgmii_set(struct mt7530_priv *priv, u32 reg, u32 val)
-{
-       mt7623_trgmii_rmw(priv, reg, 0, val);
-}
-
-static void
-mt7623_trgmii_clear(struct mt7530_priv *priv, u32 reg, u32 val)
-{
-       mt7623_trgmii_rmw(priv, reg, val, 0);
-}
-
 static int
 core_read_mmd_indirect(struct mt7530_priv *priv, int prtad, int devad)
 {
@@ -530,27 +478,6 @@ mt7530_pad_clk_setup(struct dsa_switch *ds, int mode)
                for (i = 0 ; i < NUM_TRGMII_CTRL; i++)
                        mt7530_rmw(priv, MT7530_TRGMII_RD(i),
                                   RD_TAP_MASK, RD_TAP(16));
-       else
-               if (priv->id != ID_MT7621)
-                       mt7623_trgmii_set(priv, GSW_INTF_MODE,
-                                         INTF_MODE_TRGMII);
-
-       return 0;
-}
-
-static int
-mt7623_pad_clk_setup(struct dsa_switch *ds)
-{
-       struct mt7530_priv *priv = ds->priv;
-       int i;
-
-       for (i = 0 ; i < NUM_TRGMII_CTRL; i++)
-               mt7623_trgmii_write(priv, GSW_TRGMII_TD_ODT(i),
-                                   TD_DM_DRVP(8) | TD_DM_DRVN(8));
-
-       mt7623_trgmii_set(priv, GSW_TRGMII_RCK_CTRL, RX_RST | RXC_DQSISEL);
-       mt7623_trgmii_clear(priv, GSW_TRGMII_RCK_CTRL, RX_RST);
-
        return 0;
 }
 
@@ -1303,10 +1230,6 @@ mt7530_setup(struct dsa_switch *ds)
        dn = dsa_to_port(ds, MT7530_CPU_PORT)->master->dev.of_node->parent;
 
        if (priv->id == ID_MT7530) {
-               priv->ethernet = syscon_node_to_regmap(dn);
-               if (IS_ERR(priv->ethernet))
-                       return PTR_ERR(priv->ethernet);
-
                regulator_set_voltage(priv->core_pwr, 1000000, 1000000);
                ret = regulator_enable(priv->core_pwr);
                if (ret < 0) {
@@ -1468,14 +1391,6 @@ static void mt7530_phylink_mac_config(struct dsa_switch *ds, int port,
                /* Setup TX circuit incluing relevant PAD and driving */
                mt7530_pad_clk_setup(ds, state->interface);
 
-               if (priv->id == ID_MT7530) {
-                       /* Setup RX circuit, relevant PAD and driving on the
-                        * host which must be placed after the setup on the
-                        * device side is all finished.
-                        */
-                       mt7623_pad_clk_setup(ds);
-               }
-
                priv->p6_interface = state->interface;
                break;
        default:

diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h
index ef9b52f3152b6e9db072e770e2da85062ef1cdd2..4aef6024441b8f882180d93c8c7fa3af8d2d45a4 100644 (file)
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -277,7 +277,6 @@ enum mt7530_vlan_port_attr {
 
 /* Registers for TRGMII on the both side */
 #define MT7530_TRGMII_RCK_CTRL         0x7a00
-#define GSW_TRGMII_RCK_CTRL            0x300
 #define  RX_RST                                BIT(31)
 #define  RXC_DQSISEL                   BIT(30)
 #define  DQSI1_TAP_MASK                        (0x7f << 8)
@@ -286,31 +285,24 @@ enum mt7530_vlan_port_attr {
 #define  DQSI0_TAP(x)                  ((x) & 0x7f)
 
 #define MT7530_TRGMII_RCK_RTT          0x7a04
-#define GSW_TRGMII_RCK_RTT             0x304
 #define  DQS1_GATE                     BIT(31)
 #define  DQS0_GATE                     BIT(30)
 
 #define MT7530_TRGMII_RD(x)            (0x7a10 + (x) * 8)
-#define GSW_TRGMII_RD(x)               (0x310 + (x) * 8)
 #define  BSLIP_EN                      BIT(31)
 #define  EDGE_CHK                      BIT(30)
 #define  RD_TAP_MASK                   0x7f
 #define  RD_TAP(x)                     ((x) & 0x7f)
 
-#define GSW_TRGMII_TXCTRL              0x340
 #define MT7530_TRGMII_TXCTRL           0x7a40
 #define  TRAIN_TXEN                    BIT(31)
 #define  TXC_INV                       BIT(30)
 #define  TX_RST                                BIT(28)
 
 #define MT7530_TRGMII_TD_ODT(i)                (0x7a54 + 8 * (i))
-#define GSW_TRGMII_TD_ODT(i)           (0x354 + 8 * (i))
 #define  TD_DM_DRVP(x)                 ((x) & 0xf)
 #define  TD_DM_DRVN(x)                 (((x) & 0xf) << 4)
 
-#define GSW_INTF_MODE                  0x390
-#define  INTF_MODE_TRGMII              BIT(1)
-
 #define MT7530_TRGMII_TCK_CTRL         0x7a78
 #define  TCK_TAP(x)                    (((x) & 0xf) << 8)
 
@@ -443,7 +435,6 @@ static const char *p5_intf_modes(unsigned int p5_interface)
  * @ds:                        The pointer to the dsa core structure
  * @bus:               The bus used for the device and built-in PHY
  * @rstc:              The pointer to reset control used by MCM
- * @ethernet:          The regmap used for access TRGMII-based registers
  * @core_pwr:          The power supplied into the core
  * @io_pwr:            The power supplied into the I/O
  * @reset:             The descriptor for GPIO line tied to its reset pin
@@ -460,7 +451,6 @@ struct mt7530_priv {
        struct dsa_switch       *ds;
        struct mii_bus          *bus;
        struct reset_control    *rstc;
-       struct regmap           *ethernet;
        struct regulator        *core_pwr;
        struct regulator        *io_pwr;
        struct gpio_desc        *reset;