]> git.baikalelectronics.ru Git - kernel.git/commit
KVM: x86: check PIR even for vCPUs with disabled APICv
authorPaolo Bonzini <pbonzini@redhat.com>
Tue, 23 Nov 2021 00:43:10 +0000 (19:43 -0500)
committerPaolo Bonzini <pbonzini@redhat.com>
Tue, 30 Nov 2021 08:52:39 +0000 (03:52 -0500)
commitfc9fbeb1a1f14292da73a3a28c9a9365c75e6b32
treedec097ef78d23a930833dd41a25278f3865cc9d7
parent75b1a34443959831a5562c30179e16e2254e9fef
KVM: x86: check PIR even for vCPUs with disabled APICv

The IRTE for an assigned device can trigger a POSTED_INTR_VECTOR even
if APICv is disabled on the vCPU that receives it.  In that case, the
interrupt will just cause a vmexit and leave the ON bit set together
with the PIR bit corresponding to the interrupt.

Right now, the interrupt would not be delivered until APICv is re-enabled.
However, fixing this is just a matter of always doing the PIR->IRR
synchronization, even if the vCPU has temporarily disabled APICv.

This is not a problem for performance, or if anything it is an
improvement.  First, in the common case where vcpu->arch.apicv_active is
true, one fewer check has to be performed.  Second, static_call_cond will
elide the function call if APICv is not present or disabled.  Finally,
in the case for AMD hardware we can remove the sync_pir_to_irr callback:
it is only needed for apic_has_interrupt_for_ppr, and that function
already has a fallback for !APICv.

Cc: stable@vger.kernel.org
Co-developed-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: David Matlack <dmatlack@google.com>
Message-Id: <20211123004311.2954158-4-pbonzini@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
arch/x86/kvm/lapic.c
arch/x86/kvm/svm/svm.c
arch/x86/kvm/x86.c