]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915/tgl: Don't treat unslice registers as masked
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 6 Mar 2020 17:11:39 +0000 (09:11 -0800)
committerMatt Roper <matthew.d.roper@intel.com>
Mon, 9 Mar 2020 16:17:12 +0000 (09:17 -0700)
commitfbb642d1787032b7bb11c7dd1941179c92b0d6f5
tree402bbf58b374f5cd7d2a9ee6743a295b330a2488
parent25f2c5fff01be3a5eae92cbcd2bfbb0d1ab7cba4
drm/i915/tgl: Don't treat unslice registers as masked

The UNSLICE_UNIT_LEVEL_CLKGATE and UNSLICE_UNIT_LEVEL_CLKGATE2 registers
that we update in a few engine workarounds are not masked registers
(i.e., we don't have to write a mask bit in the top 16 bits when
updating one of the lower 16 bits).  As such, these workarounds should
be applied via wa_write_or() rather than wa_masked_en()

v2:
 - Rebase

Reported-by: Nick Desaulniers <ndesaulniers@google.com>
Reported-by: kernelci.org bot <bot@kernelci.org>
References: https://github.com/ClangBuiltLinux/linux/issues/918
Fixes: f85de99d49d2 ("drm/i915/tgl: Move and restrict Wa_1408615072")
Fixes: e3747f971acc ("drm/i915/gen11: Moving WAs to rcs_engine_wa_init()")
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200306171139.1414649-1-matthew.d.roper@intel.com
drivers/gpu/drm/i915/gt/intel_workarounds.c