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(parent: 21a0ef6) | patch
[ARM SMP] Ensure secondary CPUs have a clean TLB
authorRussell King <rmk@dyn-67.arm.linux.org.uk>
Thu, 28 Jul 2005 19:32:47 +0000 (20:32 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 28 Jul 2005 19:32:47 +0000 (20:32 +0100)
commitfa4911fe80767b9563ff9c3627d67122b9067500
treeffcdb1fe79171bb0e6e02c0c197541d1b73ad5b0tree | snapshot
parent21a0ef615c9ca8ebc28cbdfefda6b5fa310b3357commit | diff
[ARM SMP] Ensure secondary CPUs have a clean TLB

Since ARMv6 CPUs will not flush the TLB on context switches, it is
possible that we may end up with some global TLB entries remaining
present, eventually upsetting userspace.  Explicitly flush the
entire TLB on secondary CPUs as they startup, after we have switched
to the init_mm page tables.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/kernel/smp.c diff | blob | history
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