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(parent: ffaf485) | patch
igb: remove redundant PHY power down register write
authorTodd Fujinaka <todd.fujinaka@intel.com>
Thu, 8 May 2014 23:20:24 +0000 (23:20 +0000)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Tue, 27 May 2014 09:10:44 +0000 (02:10 -0700)
commitf8a3d972e794cd018b8f77c9d19822107bebe507
tree1d67f8e748a8da0c2788a1f24f02d4a7c632b974tree | snapshot
parentffaf485ee996cbc5b0825a993fb14a40bdc7c5f5commit | diff
igb: remove redundant PHY power down register write

One of the registers used to power down the PHY was found to be wrong
(should be bit 2 not bit 1) on further inspection it was also found to
be redundant.

Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/igb/e1000_phy.c diff | blob | history
drivers/net/ethernet/intel/igb/e1000_phy.h diff | blob | history
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