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(parent: 1220435) | patch
MIPS: Add printing of ES bit for Imgtec cores when cache error occurs.
authorLeonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Thu, 10 Oct 2013 08:58:59 +0000 (09:58 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 22 Jan 2014 19:18:57 +0000 (20:18 +0100)
commitf78bbc956970425052948f942be1906a1eddee9c
treeddde7c8179c1e272bcf3a4aa6a80c99ed8b44972tree | snapshot
parent122043566215e21eff065174a85196b21b7e8e49commit | diff
MIPS: Add printing of ES bit for Imgtec cores when cache error occurs.

The cacheer register is always implemented in the same way in the
MIPS32r2 Imgtec cores so print the ES bit when an cache error
occurs.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6041/
arch/mips/kernel/traps.c diff | blob | history
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