]> git.baikalelectronics.ru Git - kernel.git/commit
MIPS: Octeon: Update register definitions for CN63XX chips
authorDavid Daney <ddaney@caviumnetworks.com>
Thu, 7 Oct 2010 23:03:40 +0000 (16:03 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Fri, 29 Oct 2010 18:08:33 +0000 (19:08 +0100)
commitf75d6d52af211a1699e5040a7f4443b9cbf1c1f6
tree538f1564b70d017b224a423d99bc2a0366c1f745
parentb6ee86b5fbeda63c0cc39966ecae57809c1d75e6
MIPS: Octeon: Update register definitions for CN63XX chips

The CN63XX is a new 6-CPU SOC based on the new OCTEON II CPU cores.

Join some lines back together.  This makes some of them exceed 80
columns, but they are uninteresting and this unclutters things.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1668/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
20 files changed:
arch/mips/include/asm/octeon/cvmx-agl-defs.h
arch/mips/include/asm/octeon/cvmx-ciu-defs.h
arch/mips/include/asm/octeon/cvmx-gpio-defs.h
arch/mips/include/asm/octeon/cvmx-iob-defs.h
arch/mips/include/asm/octeon/cvmx-ipd-defs.h
arch/mips/include/asm/octeon/cvmx-l2c-defs.h
arch/mips/include/asm/octeon/cvmx-l2d-defs.h
arch/mips/include/asm/octeon/cvmx-l2t-defs.h
arch/mips/include/asm/octeon/cvmx-led-defs.h
arch/mips/include/asm/octeon/cvmx-mio-defs.h
arch/mips/include/asm/octeon/cvmx-mixx-defs.h
arch/mips/include/asm/octeon/cvmx-npei-defs.h
arch/mips/include/asm/octeon/cvmx-npi-defs.h
arch/mips/include/asm/octeon/cvmx-pci-defs.h
arch/mips/include/asm/octeon/cvmx-pciercx-defs.h
arch/mips/include/asm/octeon/cvmx-pescx-defs.h
arch/mips/include/asm/octeon/cvmx-pexp-defs.h
arch/mips/include/asm/octeon/cvmx-pow-defs.h
arch/mips/include/asm/octeon/cvmx-rnm-defs.h
arch/mips/include/asm/octeon/cvmx-smix-defs.h