]> git.baikalelectronics.ru Git - kernel.git/commit
clk: tegra: Allow PLLE training to succeed
authorThierry Reding <thierry.reding@avionic-design.de>
Thu, 14 Mar 2013 15:27:05 +0000 (16:27 +0100)
committerMike Turquette <mturquette@linaro.org>
Mon, 1 Apr 2013 18:44:38 +0000 (11:44 -0700)
commitf53deb1e4d994051ad5a4a4c42608b1b0c194769
tree7236ae7d234d20f2dacefd1fb8814d06cb57cdc2
parentf64b98f6321b322ab9cd9e57f5d96e9055875194
clk: tegra: Allow PLLE training to succeed

Under some circumstances the PLLE needs to be retrained, in which case
access to the PMC registers is required. Fix this by passing a pointer
to the PMC registers instead of NULL when registering the PLLE clock.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
drivers/clk/tegra/clk-tegra20.c