]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915/execlists: Cache ELSP register offset
authorChris Wilson <chris@chris-wilson.co.uk>
Thu, 7 Dec 2017 22:24:34 +0000 (22:24 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Fri, 8 Dec 2017 00:37:05 +0000 (00:37 +0000)
commitf52e482d1e006608663603ac10f6475d69dc9c95
treee546d212490a9daefc2539ad6a023d29336432d1
parent78496cbde5cb5d9c525e69060b71efea89b63e76
drm/i915/execlists: Cache ELSP register offset

Currently on every submission, we recalculate the ELSP register offset
for the engine, after chasing the pointers to find the iomem base. Since
this is fixed for the lifetime of the driver, record the offset in the
execlists struct.

In practice the difference is negligible, it just happens to remove 27
bytes of eyesore pointer dancing from next to the hottest instruction
(which is itself due to stalling for a cache miss) in perf profiles of
the execlists_submission_tasklet().

v2: Trim off one more elsp local.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171207222434.17686-1-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/intel_lrc.c
drivers/gpu/drm/i915/intel_ringbuffer.h