]> git.baikalelectronics.ru Git - kernel.git/commit
MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt)
authorAl Cooper <alcooperx@gmail.com>
Fri, 13 Jul 2012 20:44:51 +0000 (16:44 -0400)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 11 Oct 2012 09:04:34 +0000 (11:04 +0200)
commitf3f18fb0309bcc07c23055a10bbc631f9d0f995b
tree7cbb0b1ce047c514f92da5ef382ca0bc6002cf21
parentba3c533e2d6f2319e702436fcbc57e59a18a57e8
MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt)

The PCI (Program Counter Interrupt) bit in the "cause" register
is mandatory for MIPS32R2 cores, but has also been added to some R1
cores (BMIPS5000). This change adds a cpu feature bit to make it
easier to check for and use this feature.

Signed-off-by: Al Cooper <alcooperx@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/4106/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/cpu-features.h
arch/mips/include/asm/cpu.h
arch/mips/include/asm/mipsregs.h
arch/mips/kernel/cpu-probe.c
arch/mips/kernel/perf_event_mipsxx.c