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(parent: 2ae7a63) | patch
iommu/tegra: gart: Fix register offset correctly
authorHiroshi DOYU <hdoyu@nvidia.com>
Thu, 10 May 2012 07:45:32 +0000 (10:45 +0300)
committerJoerg Roedel <joerg.roedel@amd.com>
Fri, 11 May 2012 09:42:05 +0000 (11:42 +0200)
commitf176c1d461b112f0f789bb12ab0c11322caeadb4
treec93680af050fcef7f5aff981ecfd3cf60abaf570tree | snapshot
parent2ae7a634aaa14e193c65d1f3162a6d4fb9df888ccommit | diff
iommu/tegra: gart: Fix register offset correctly

DT passes the exact GART register ranges without any overlapping with
MC register ranges. GART register offset needs to be adjusted by one
passed by DT correctly.

Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt diff | blob | history
drivers/iommu/tegra-gart.c diff | blob | history
Linux Kernel Source Tree.