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(parent: 949e9e0) | patch
RISC-V: Enable sstc extension parsing from DT
authorAtish Patra <atishp@rivosinc.com>
Fri, 22 Jul 2022 16:50:45 +0000 (09:50 -0700)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 11 Aug 2022 21:36:13 +0000 (14:36 -0700)
commiteca173d4a8425a6e53f3e26159c60f3ba3018718
tree56b5a4be274df53a837dc3377d94cd21e30606c5tree | snapshot
parent949e9e029309ab1f0a54341d66d1a1a8d7de8914commit | diff
RISC-V: Enable sstc extension parsing from DT

The ISA extension framework now allows parsing any multi-letter
ISA extension.

Enable that for sstc extension.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20220722165047.519994-3-atishp@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/hwcap.h diff | blob | history
arch/riscv/kernel/cpu.c diff | blob | history
arch/riscv/kernel/cpufeature.c diff | blob | history
Linux Kernel Source Tree.