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(parent: 6bb10fd) | patch
[MIPS] MT: Initialise all writable bits in Cause register to zero.
authorChris Dearman <chris@mips.com>
Mon, 7 Aug 2006 14:08:01 +0000 (15:08 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 27 Sep 2006 12:37:33 +0000 (13:37 +0100)
commitdfcd446ed4de2b39e418dfdd72c0c38691c6a3ff
tree46374a118b2f42c17aef00ec478021043e56e38btree | snapshot
parent6bb10fd0ab4651731c8a7b21fcd11176acc2bff0commit | diff
[MIPS] MT: Initialise all writable bits in Cause register to zero.

Recent 34Ks come out of reset with WP enabled on VPE 1 so we take an
immediate exception when starting the second VPE.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/smp-mt.c diff | blob | history
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