]> git.baikalelectronics.ru Git - kernel.git/commit
LoongArch: Use TLB for ioremap()
authorHuacai Chen <chenhuacai@loongson.cn>
Wed, 12 Oct 2022 08:36:14 +0000 (16:36 +0800)
committerHuacai Chen <chenhuacai@loongson.cn>
Wed, 12 Oct 2022 08:36:14 +0000 (16:36 +0800)
commitdc0b39dab1571b03f7eb9544ad8fba43b6260860
treed77ab5ef3f2ac782823aea728906a7942af1c35a
parent6e548079a728736273144a10a4fe38e84f9bd234
LoongArch: Use TLB for ioremap()

We can support more cache attributes (e.g., CC, SUC and WUC) and page
protection when we use TLB for ioremap(). The implementation is based
on GENERIC_IOREMAP.

The existing simple ioremap() implementation has better performance so
we keep it and introduce ARCH_IOREMAP to control the selection.

We move pagetable_init() earlier to make early ioremap() works, and we
modify the PCI ecam mapping because the TLB-based version of ioremap()
will actually take the size into account.

Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
arch/loongarch/Kconfig
arch/loongarch/include/asm/fixmap.h
arch/loongarch/include/asm/io.h
arch/loongarch/include/asm/pgtable-bits.h
arch/loongarch/kernel/setup.c
arch/loongarch/mm/init.c
arch/loongarch/pci/acpi.c