]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915: Handle 320 vs. 333 MHz cdclk on vlv
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 13 Jun 2014 10:37:50 +0000 (13:37 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 7 Jul 2014 09:24:04 +0000 (11:24 +0200)
commitd0dec9a69ca90f77630ca5692af5f867a5ae0a8c
tree3c32afa5e9bdc649578823c672e232d63aaae1c1
parent733c52a2f740363b1b9d6e7dd15981dc9435e16b
drm/i915: Handle 320 vs. 333 MHz cdclk on vlv

Depending on the HPLL frequency one of the supported cdclk frquencies is
either 320MHz or 333MHz. Figure out which one it is to accurately pick
the minimal required cdclk. This would also avoid a warning from the
cdclk code where it compares the actual cdclk read out from the hardware
with a value that was calculated using valleyview_calc_cdclk().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c