]> git.baikalelectronics.ru Git - kernel.git/commit
drm/tegra: sor: Registers are 32-bit
authorThierry Reding <treding@nvidia.com>
Mon, 26 Jan 2015 15:02:48 +0000 (16:02 +0100)
committerThierry Reding <treding@nvidia.com>
Thu, 2 Apr 2015 16:46:16 +0000 (18:46 +0200)
commitd03b25c195f92f60a21095cdd92e2b262bc031c2
treed40639a99dc33d82b6586b2b27c68c36bac18d46
parente892d26067e4c219f6dac7e90105d62e9b12d101
drm/tegra: sor: Registers are 32-bit

Use a sized unsigned 32-bit data type (u32) to store register contents.
The SOR registers are 32 bits wide irrespective of the architecture's
data width.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/gpu/drm/tegra/sor.c