dt-bindings: arm: Document Renesas R-Car M3-N-based ULCB board

dt-bindings: arm: Document Renesas R-Car M3-N-based ULCB board

In harmony with ATF and U-Boot outputs [1] and [2], the new board is
based on M3-N revision ES1.1 and the amount of memory present on SiP
is 2GiB, contiguously addressed.

The amount of RAM is mentioned based on the assumption that it is
encoded in the board id/string. There is some evidence supporting this
in form of last-digit-mismatch between two R-Car H3 ES2.0 ULCB board
ids, one with 4GiB and one with 8GiB of RAM (see [3]).

[1] BL2: R-Car Gen3 Initial Program Loader(CA57) Rev.1.0.21
    BL2: PRR is R-Car M3N Ver.1.1

[2] U-Boot 2015.04-00295-*
    CPU: Renesas Electronics R8A77965 rev 1.1
    ---8<----
    DRAM:  1.9 GiB
    Bank #0: 0x048000000 - 0x0bfffffff, 1.9 GiB
    ---8<----

[3] https://patchwork.kernel.org/patch/10555957/#22169325

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>