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(parent: 8c1a3ab) | patch
ARM: tegra: fix pclk rate
authorStephen Warren <swarren@nvidia.com>
Fri, 20 Apr 2012 22:58:18 +0000 (16:58 -0600)
committerStephen Warren <swarren@nvidia.com>
Wed, 25 Apr 2012 21:22:09 +0000 (15:22 -0600)
commitce1f315db76b8eddff87d595b037168534730520
tree43328bab20e3fe0e2c0a613b5860eabd4802342ftree | snapshot
parent8c1a3ab527183ecf2d3c9a34e642a8659d29e0c8commit | diff
ARM: tegra: fix pclk rate

Commit 40f9cf0 "ARM: tegra: reparent sclk to pll_c_out1" changed the
rate of hclk. Since pclk is derived from that, and only has integer
dividers, the pclk rate needs to change in the same fashion, from 54MHz
to 60MHz.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
arch/arm/mach-tegra/common.c diff | blob | history
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