]> git.baikalelectronics.ru Git - kernel.git/commit
irqchip/gic-v4.1: Ensure accessing the correct RD when writing INVALLR
authorZenghui Yu <yuzenghui@huawei.com>
Mon, 20 Jul 2020 09:23:28 +0000 (17:23 +0800)
committerMarc Zyngier <maz@kernel.org>
Mon, 27 Jul 2020 07:55:03 +0000 (08:55 +0100)
commitcd7fd6232a9ae0415330ae981414c6a1bbee0c3d
tree2bc966928fa712ca99b2fc0344ec678f50780ee2
parent9036ed9041d2af796b8ed2b11a57ac033b650780
irqchip/gic-v4.1: Ensure accessing the correct RD when writing INVALLR

The GICv4.1 spec tells us that it's CONSTRAINED UNPREDICTABLE to issue a
register-based invalidation operation for a vPEID not mapped to that RD,
or another RD within the same CommonLPIAff group.

To follow this rule, commit aa8ca837f5e1 ("irqchip/gic-v4.1: Ensure mutual
exclusion between vPE affinity change and RD access") tried to address the
race between the RD accesses and the vPE affinity change, but somehow
forgot to take GICR_INVALLR into account. Let's take the vpe_lock before
evaluating vpe->col_idx to fix it.

Fixes: aa8ca837f5e1 ("irqchip/gic-v4.1: Ensure mutual exclusion between vPE affinity change and RD access")
Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200720092328.708-1-yuzenghui@huawei.com
drivers/irqchip/irq-gic-v3-its.c