MIPS: malta: Incorporate PIIX4 ACPI I/O region in PCI controller resources

MIPS: malta: Incorporate PIIX4 ACPI I/O region in PCI controller resources

Boot log says:

pci 0000:00:0a.3: no compatible bridge window for [io  0x1000-0x103f]
pci 0000:00:0a.3: no compatible bridge window for [io  0x1100-0x110f]

The io resource starting point on Malta was modified by 71cbeb8eef (MIPS:
Malta: Change start address to avoid conflicts.) to avoid conflicts with
ACPI and SMB devices. In fact, that was not needed (and now causing
southbridge ACPI missing) since 4c1f7c10a4 (PCI: add pci_create_root_bus()
that accepts resource list) and 377306fe44 (mips/PCI: convert to
pci_scan_root_bus() for correct root bus resources) had already done the
correct fix.

This patch actually reverts the change made by 71cbeb8eef. And with this
fix, log says:

pci 0000:00:0a.3: quirk: [io  0x1000-0x103f] claimed by PIIX4 ACPI
pci 0000:00:0a.3: quirk: [io  0x1100-0x110f] claimed by PIIX4 SMB

These things may not be used but as part of platform resources are better
off to be included.

Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6037/