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(parent: 0ae4093) | patch
intel_pmc_ipc: Fix GCR register base address and length
authorQipeng Zha <qipeng.zha@intel.com>
Wed, 17 Feb 2016 18:03:37 +0000 (02:03 +0800)
committerDarren Hart <dvhart@linux.intel.com>
Wed, 23 Mar 2016 17:05:47 +0000 (10:05 -0700)
commitcc9a382131b1c59c14dc9aa2b8accdb59fac3ab4
treebaa5c2cfe1aafba7765cbf03cefd2d8ebffa1d4atree | snapshot
parent0ae409324f781d318d25499ab29329a86f211cd7commit | diff
intel_pmc_ipc: Fix GCR register base address and length

GCR register (pmc_cfg register) is at offset 0x1008, and
remapping of 0x4 bytes is enough.

Signed-off-by: Francois-Nicolas Muller <francois-nicolas.muller@intel.com>
Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Darren Hart <dvhart@linux.intel.com>
drivers/platform/x86/intel_pmc_ipc.c diff | blob | history
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