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(parent: ed5baa6) | patch
intel_idle: add core C6 optimization for SPR
authorArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
Wed, 2 Mar 2022 08:16:00 +0000 (10:16 +0200)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Fri, 4 Mar 2022 18:54:32 +0000 (19:54 +0100)
commitc3e064f5f28670d099782855df7fd8bcc91d9f60
tree72b57b5e202ebf70230baceb1bde4ebe9facaee0tree | snapshot
parented5baa6912eb68216420682981eb256623f2c54acommit | diff
intel_idle: add core C6 optimization for SPR

Add a Sapphire Rapids Xeon C6 optimization, similar to what we have for Sky Lake
Xeon: if package C6 is disabled, adjust C6 exit latency and target residency to
match core C6 values, instead of using the default package C6 values.

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
drivers/idle/intel_idle.c diff | blob | history
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