]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915: Configure GEN6_RP_DOWN_TIMEOUT on CHV
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 19 Jan 2015 11:50:49 +0000 (13:50 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 27 Jan 2015 08:50:45 +0000 (09:50 +0100)
commitc2fb604c6fc4e10de996ef3c399d083da599ee72
tree5574c195d0c6f8b8253cc099f9c944c826b68950
parentcbe15cfd4631f37d1d87914dffe9454f8ebc312a
drm/i915: Configure GEN6_RP_DOWN_TIMEOUT on CHV

CherryViewA0_iGfx_BIOS_DRIVER_PUNIT_spec_y14w28d5 tells us not to enable
the RP down timeout interrupt, and says that the timeout value is hence
not used. We do enable that interrupt currently though, so leaving the
timeout as 0 results in very poor performance as the GPU frequency keeps
dropping constantly. So just program the register with the recommended
value.

Leaving the interrupt enabled doesn't seem to do any harm so far. So
I've decided to leave it on for now, just to avoid making CHV a
special case.

This fixes the performance regression from:
 commit bde2d4175cc0b119b4d4c0f1b9a18dfbedad778f
 Author: Deepak S <deepak.s@linux.intel.com>
 Date:   Sat Dec 13 11:43:27 2014 +0530

    drm/i915/chv: Use timeout mode for RC6 on chv

Cc: Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Deepak S<deepak.s@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_pm.c