]> git.baikalelectronics.ru Git - kernel.git/commit
drm/amdgpu: fix CGTS_TCC_DISABLE register offset on gfx10.3
authorMarek Olšák <marek.olsak@amd.com>
Thu, 4 Feb 2021 07:46:20 +0000 (02:46 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 18 Feb 2021 21:42:55 +0000 (16:42 -0500)
commitbaf7eba34f5559059b8778f933c57b0548f82cd0
tree4600616629e5826306e63ecacfebc3dbf998cdf4
parent0647889b88176e9856b22efc7a940580dad507a8
drm/amdgpu: fix CGTS_TCC_DISABLE register offset on gfx10.3

This fixes incorrect TCC harvesting info reported to userspace.
The impact was a very very tiny performance degradation (unnecessary
GL2 cache flushes).

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c