]> git.baikalelectronics.ru Git - kernel.git/commit
MIPS: BMIPS: support booting from physical CPU other than 0
authorFlorian Fainelli <florian@openwrt.org>
Wed, 26 Jun 2013 18:11:56 +0000 (18:11 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 1 Jul 2013 13:10:57 +0000 (15:10 +0200)
commitb8a43c9d3227fbb087de39ba7d3b728f53b8647f
treeda36cde86ad23e4bab0077e9528959a2bc93f293
parent05e6961de5b8c5e33e3d7cadd3c0c827071d9fc8
MIPS: BMIPS: support booting from physical CPU other than 0

BMIPS43xx CPUs have two hardware threads, and on some SoCs such as 3368,
the bootloader has configured the system to boot from TP1 instead of the
more usual TP0. Create the physical to logical CPU mapping to cope with
that, do not remap the software interrupts to be cross CPUs such that we
do not have to do use the logical CPU mapping further down the code, and
finally, reset the slave TP1 only if booted from TP0.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: blogic@openwrt.org
Cc: cernekee@gmail.com
Patchwork: https://patchwork.linux-mips.org/patch/5553/
Patchwork: https://patchwork.linux-mips.org/patch/5556/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/smp-bmips.c