]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915: don't set the FBC plane select bits on HSW+
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Fri, 12 Jun 2015 17:36:21 +0000 (14:36 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 15 Jun 2015 16:36:42 +0000 (18:36 +0200)
commitb63ed2a161ec2f6a3bf9b8a68546c8daaa57a480
tree13c45ec6061579c7aea86c47528d6395d5278bdb
parentc2f4cdb74965be18fc1cba215434c79b00d9e461
drm/i915: don't set the FBC plane select bits on HSW+

This commit is just to make the intentions explicit: on HSW+ these
bits are MBZ, but since we only support plane A and the macro
evaluates to zero when plane A is the parameter, we're not fixing any
bug.

v2:
 - Remove useless extra blank like (Chris).
 - Init dpfc_ctl in another place (Chris).

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_fbc.c