]> git.baikalelectronics.ru Git - kernel.git/commit
MIPS: Malta: mux & enable SERIRQ interrupt
authorPaul Burton <paul.burton@imgtec.com>
Mon, 2 Dec 2013 16:48:37 +0000 (16:48 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 23 Jan 2014 12:02:35 +0000 (13:02 +0100)
commitb49d286237ef6cc41a602cf40247370bc12b8d31
tree5cad4268f616744749f6ea23e5ce406ecd2aec35
parentf18393ae9bda48ecb7c1164df60f6dc6cca16218
MIPS: Malta: mux & enable SERIRQ interrupt

This patch causes the kernel to mux the SERIRQ interrupt to the SERIRQ
pin of the PIIX4 and to enable that interrupt. The kernel depends upon
the interrupt when using the SuperIO UARTs (ttyS0 & ttyS1) but
previously would not configure it, instead relying upon the bootloader
having done so. If that is not the case then the typical result is that
the system appears to hang once it reaches userland as no output is
displayed on the UART.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6182/
arch/mips/include/asm/mips-boards/piix4.h
arch/mips/pci/fixup-malta.c