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ARM: shmobile: r8a7740 dtsi: Correct IIC0 parent clock
authorGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 5 Nov 2014 10:04:34 +0000 (11:04 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Mon, 10 Nov 2014 00:56:01 +0000 (09:56 +0900)
commitb42bb35bb888265922a5d8f985bcc4425c5ddbbb
tree7ac9b5f8c4a8efa7a8351154d175edbbbda1ab89tree | snapshot
parentc3a409b0c704ca19167545323284c8615a37c04ecommit | diff
ARM: shmobile: r8a7740 dtsi: Correct IIC0 parent clock

According to the datasheet, the operating clock for IIC0 is the HPP
(RT Peri) clock, not the SUB (Peri) clock. Both clocks run at the same
speed (50 Mhz).

This is consistent with IIC0 being located in the A4R PM domain, and
IIC1 in the A3SP PM domain.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7740.dtsi diff | blob | history
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