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RISC-V: Change variable type for 32-bit compatible
authorZong Li <zong@andestech.com>
Mon, 25 Jun 2018 08:49:40 +0000 (16:49 +0800)
committerPalmer Dabbelt <palmer@sifive.com>
Wed, 4 Jul 2018 20:56:52 +0000 (13:56 -0700)
commitb0b74bc9591534e98b088b7eb5d534119371b6b4
tree65bacd8591ee07fd052f8c660232cc118f946f72tree | snapshot
parent60c78521d72f75cd01744d7091bf1478b053d734commit | diff
RISC-V: Change variable type for 32-bit compatible

Signed-off-by: Zong Li <zong@andestech.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
arch/riscv/kernel/module.c diff | blob | history
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