]> git.baikalelectronics.ru Git - kernel.git/commit
drm/amd/display: Dynamic cursor cache size for MALL eligibility check
authorBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Tue, 19 Jan 2021 19:10:21 +0000 (14:10 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 21 Jan 2021 14:54:26 +0000 (09:54 -0500)
commitab51486743d8da183b6edaa9224e5e86cb7f0da2
tree8b464e6ba27276042ca44254c8b5112816c58c7b
parent757e3d8e64625ad78f303d38d54aa50ec4c2d855
drm/amd/display: Dynamic cursor cache size for MALL eligibility check

[Why]
Currently we use the maximum possible cursor cache size when deciding if we
should attempt to enable MALL, but this prevents us from enabling the
feature for certain key use cases.

[How]
 - consider cursor bpp when calculating if the cursor fits

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc.c
drivers/gpu/drm/amd/display/dc/dc.h
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h
drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h