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platform/x86: intel_mid_powerbtn: Acknowledge interrupts
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Thu, 19 Jan 2017 16:39:45 +0000 (18:39 +0200)
committerDarren Hart <dvhart@linux.intel.com>
Sat, 4 Feb 2017 01:47:23 +0000 (02:47 +0100)
commita9749a19afe2c1d60d1575f621f42eaf444eba18
tree18f4b811d8a098374d76a51acd06fdd28c47b025tree | snapshot
parent994eac87e1f6c9167461f9ebde70156828eba55dcommit | diff
platform/x86: intel_mid_powerbtn: Acknowledge interrupts

Some platforms require interrupt to be acknowledged by clearing
MSIC_PWRBTNM bit in interrupt level 1 mask register.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
drivers/platform/x86/intel_mid_powerbtn.c diff | blob | history
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