]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915/gen10: Calculate and enable transition WM
authorKumar, Mahesh <mahesh1.kumar@intel.com>
Thu, 17 Aug 2017 13:45:24 +0000 (19:15 +0530)
committerMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Thu, 7 Sep 2017 11:34:14 +0000 (13:34 +0200)
commita4e28a7060d0e684bb3be97a09da7eaaeb61f824
treef5f2be737b3f6828db043760e22d1464959fca1d
parent21e290e38bbb14561d601dee131f53e2acc1c67e
drm/i915/gen10: Calculate and enable transition WM

GEN > 9 require transition WM to be programmed if IPC is enabled.
This patch calculates & enable transition WM for supported platforms.
If transition WM is enabled, Plane read requests are sent at high
priority until filling above the transition watermark, then the
requests are sent at lower priority until dropping below the level-0 WM.
The lower priority requests allow other memory clients to have better
memory access.

transition minimum is the minimum amount needed for trans_wm to work to
ensure  the demote does not happen before enough data has been read to
meet the level 0 watermark requirements.

transition amount is configurable value. Higher values will
tend to cause longer periods of high priority reads followed by longer
periods of lower priority reads. Tuning to lower values will tend to
cause shorter periods of high and lower priority reads.

Keeping transition amount to 10 in this patch, as suggested by HW team.

Changes since V1:
 - Address review comments from Maarten

Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170817134529.2839-4-mahesh1.kumar@intel.com
drivers/gpu/drm/i915/intel_pm.c