]> git.baikalelectronics.ru Git - kernel.git/commit
octeontx2-af: Return correct CGX RX fifo size
authorSubbaraya Sundeep <sbhatta@marvell.com>
Thu, 18 Mar 2021 14:15:45 +0000 (19:45 +0530)
committerDavid S. Miller <davem@davemloft.net>
Thu, 18 Mar 2021 21:12:42 +0000 (14:12 -0700)
commita36032b921bb3951c9824fa653dc121b17247361
tree35972ac5d9b867da9fac44d79c9c2e77fd4e864d
parentb7d2defcacd53e767e6e05ad07fe4fc3b1440d87
octeontx2-af: Return correct CGX RX fifo size

CGX receive buffer size is a constant value and
cannot be read from CGX0 block always since
CGX0 may not enabled everytime. Hence return CGX
receive buffer size from first enabled CGX block
instead of CGX0.

Fixes: e2cbd6fcef41 ("octeontx2-af: cn10K: MTU configuration")
Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com>
Signed-off-by: Hariprasad Kelam <hkelam@marvell.com>
Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c