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clk: rockchip: add 533.25MHz to rk3399 clock rates table
authorXing Zheng <zhengxing@rock-chips.com>
Fri, 21 Oct 2016 04:03:40 +0000 (12:03 +0800)
committerHeiko Stuebner <heiko@sntech.de>
Fri, 21 Oct 2016 07:34:19 +0000 (09:34 +0200)
commit9ca5f89cb58083d5c05d7b66febdfa37d4df3bff
tree80e6471ee2c5dfebca74bbb7d4f90624cc03de00tree | snapshot
parent1df7eb1ca477b826c461b694d57789b4da41844acommit | diff
clk: rockchip: add 533.25MHz to rk3399 clock rates table

We need to get the accurate 533.25MHz for the DP display.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk-rk3399.c diff | blob | history
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