]> git.baikalelectronics.ru Git - kernel.git/commit
MIPS: smp-cps: Ensure secondary cores start with EVA disabled
authorMatt Redfearn <matt.redfearn@imgtec.com>
Fri, 18 Dec 2015 12:47:00 +0000 (12:47 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Sun, 24 Jan 2016 01:09:53 +0000 (02:09 +0100)
commit9b49b7255f606dcb901a4b20ea9b38a29eba0b5d
tree13da5debc46182d0033906606f0098170b91889c
parentaf0b6b0f79a067c55d768c36e400b9e18fe7bd70
MIPS: smp-cps: Ensure secondary cores start with EVA disabled

The kernel currently assumes that a core will start up in legacy mode
using the exception base provided through the CM GCR registers. If a
core has been configured in hardware to start in EVA mode, these
assumptions will fail.

This patch ensures that secondary cores are initialized to meet these
assumptions.

Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11907/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/mips-cm.h
arch/mips/kernel/smp-cps.c