]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915/hsw+: Add support for multiple power well regs
authorImre Deak <imre.deak@intel.com>
Mon, 14 Aug 2017 15:15:30 +0000 (18:15 +0300)
committerImre Deak <imre.deak@intel.com>
Tue, 15 Aug 2017 12:28:10 +0000 (15:28 +0300)
commit98b04f8ca7a795886893cad5e265544d19a2c9b7
treecaf74602fcb01ea769822786c7afb83dd60ef078
parentd4537569cb14acc4d3d004a5dc214538ecb03da5
drm/i915/hsw+: Add support for multiple power well regs

Future platforms increase the number of power wells which require
additional control registers. A convenient way to select the correct
register is to use the high bits of the power well ID as index. This
patch only prepares for this, while upcoming platform enabling patches
will add the actual new power well IDs and corresponding power well
control registers.

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Rakshmi Bhatia <rakshmi.bhatia@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Rakshmi Bhatia <rakshmi.bhatia@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170814151530.24154-2-imre.deak@intel.com
drivers/gpu/drm/i915/gvt/handlers.c
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_runtime_pm.c