]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915/tgl: Add and use new DC5 and DC6 residency counter registers
authorJosé Roberto de Souza <jose.souza@intel.com>
Fri, 26 Jul 2019 00:24:10 +0000 (17:24 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Thu, 1 Aug 2019 21:36:54 +0000 (14:36 -0700)
commit932e952d3d7f2056d5b3483bec6b9b7c1ab5666a
treecbbec55bcde1b7a40da466283d57c04b254d3da9
parent0d5753e36ba87809e1bf643f5507394ad3aebe29
drm/i915/tgl: Add and use new DC5 and DC6 residency counter registers

Tiger Lake has a new register offset for DC5 and DC6 residency counters.

v2:
  - Rename registers since they are not in the CSR memory range
    (requested by Anshuman)
  - Fix type (requested by Matthew)

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190726002412.5827-2-lucas.demarchi@intel.com
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_reg.h